參數(shù)資料
型號： DSD1608PAH
英文描述： 8-CHANNEL, ENHANCED MULTIFORMAT, DELTA-SIGMA, DIGITAL-TO-ANALOG CONVERTER
中文描述： 8通道，增強多格式，Δ-Σ，數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù)： 23/41頁
文件大?。?/td> 293K
代理商： DSD1608PAH
DSD1608
SLES040
–
JUNE 2002
www.ti.com
23
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 9
R/W
0
0
0
1
0
0
1
DAC8
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
R/W
Read/Write Mode Select
When R/W = 0, a write operation is performed. When R/W = 1, a read operation is performed.
DACx
DAC Operation Control
:PCM/DSD Mode
Where x = 1 to 8, corresponding to the DAC output V
OUT
1 to V
OUT
8. Default value: 0
DACx = 0
DACx = 1
DAC operation enabled (default)
DAC operation disabled
The DAC operation controls are used to enable and disable the DAC outputs, V
OUT
1 to V
OUT
8. When DACx = 0,
the corresponding output generates the audio waveform dictated by the data present on the DATA pin. When DACx
= 1, the corresponding output is set to the bipolar zero level, or V
CC
/ 2. In the TDMCA mode, the DACx bits are
affected after the next PLRCK when the write operation occurs.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 10
R/W
0
0
0
1
0
1
0
RSV
FLT
ATS
RSV
CKCE
FMT2
FMT1
FMT0
R/W
Read/Write Mode Select
When R/W = 0, a write operation is performed. When R/W = 1, a read operation is performed.
RSV
Reserved Bit
The RSV bit must be set to 0.
FLT
Digital Filter Roll-Off Control
:PCM Mode
Default value: 0
FLT = 0
FLT = 1
Sharp rolloff (default)
Slow rolloff
The FLT bit allows the user to select the digital filter rolloff that is best suited to a particular application. Two filter rolloff
selections are available: sharp and slow. The filter responses for these selections are shown in the
Typical
Performance Curves
section of this data sheet.
ATS
Attenuation Rate Select
:PCM/DSD Mode
Default value: 0
ATS = 0
ATS = 1
8/f
S
(default)
16/f
S
The ATS bit is used to select the rate at which the attenuator is decremented / incremented during level transitions.
CKCE
Clock Select Control
:DSD Mode
Default value: 0
CKCE = 0
CKCE = 1
System clock is applied to PSCK in the DSD mode (default).
System clock is applied to DSCK in the DSD mode.
The CKCE bit selects the system clock source in the DSD mode (PSCK or DSCK). The CKCE bit must be set before
the DSD bit in register 12 can be set to 1.
FMT[2:0]
Audio Interface Data Format
:PCM Mode
Default value: 000. The FMT[2:0] bits are used to select the data format for the serial audio interface. The table below
shows the available format options.
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