參數(shù)資料
型號： DSD1608PAH
英文描述： 8-CHANNEL, ENHANCED MULTIFORMAT, DELTA-SIGMA, DIGITAL-TO-ANALOG CONVERTER
中文描述： 8通道，增強(qiáng)多格式，Δ-Σ，數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù)： 27/41頁
文件大小： 293K
代理商： DSD1608PAH
DSD1608
SLES040
–
JUNE 2002
www.ti.com
27
f
–
Frequency
–
Hz
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60
–
50
–
40
–
30
–
20
–
10
0
10
R
–
RESPONSE
vs
FREQUENCY
100
10M
1k
100k
10k
1M
Figure 30. Analog Output Filter Performance (100 Hz
–
10 MHz)
ZERO FLAGS
The DSD1608 includes circuitry for detecting an all-zero data condition for the audio data input pin and output pins
for indicating the result.
Zero Detect Condition
Zero detection for each channel or combination of channels is independent from any other.
In PCM mode, if the data for a given channel or channel combination remains at a 0 level for 1024 sample periods
(or PLRCK clock periods), a zero-detect condition exists for that channel or combination of channels.
In DSD mode, zero detection is not available.
Zero Output Flags
Given that a zero-detect condition exists for each channel or combination of channels, the zero flag pins for those
conditions will be set to a logic 1 state. There are three zero flag pins for channel 1, ZERO1 (pin 6), for channel 2,
ZERO2 (pin 7) and for a logical AND of channels 3 through 8, ZERO38 (pin 8). These pins can be used to operate
external mute circuits, or used as status indicators for a microcontroller, audio signal processor, or other digitally
controlled circuit.
The active polarity of the zero flag outputs can be inverted by setting the ZREV bit of control register 12 to 1. The
reset default is active-high output, or ZREV = 0.
相關(guān)PDF資料
PDF描述
DSD1608PAHR 8-CHANNEL, ENHANCED MULTIFORMAT, DELTA-SIGMA, DIGITAL-TO-ANALOG CONVERTER
DSD1700 Direct Stream Digital⑩ DSD⑩ TM Audio DIGITAL-TO-ANALOG CONVERTER
DSD1700E DIODE - SCHOTTKY, 3A (SMT)
DSD1792 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
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