參數(shù)資料
型號： DSD1792
元件分類： DAC
英文描述： 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
中文描述： 24位192千赫采樣高級分段音頻立體聲數(shù)模轉換器
文件頁數(shù)： 17/56頁
文件大?。?/td> 497K
代理商： DSD1792
SLES067A MARCH 2003 REVISED AUGUST 2003
www.ti.com
17
AUDIO DATA INTERFACE
Audio Serial Interface
The audio interface port is a 3-wire serial port. It includes PLRCK (pin 4), PBCK (pin 6), and PDATA (pin 5). PBCK is the
serial audio bit clock, and it is used to clock the serial data present on PDATA into the serial shift register of the audio
interface. Serial data is clocked into the DSD1792 on the rising edge of PBCK. PLRCK is the serial audio left/right word
clock.
The DSD1792 requires the synchronization of PLRCK and the system clock, but does not need a specific phase relation
between PLRCK and the system clock.
If the relationship between PLRCK and the system clock changes more than
±
6 PBCK, internal operation is initialized within
1/f
S
and analog outputs are forced to the bipolar zero level until resynchronization between PLRCK and the system clock
is completed.
PCM Audio Data Formats and Timing
The DSD1792 supports industry-standard audio data formats, including standard right-justified, I
2
S, and left-justified. The
data formats are shown in Figure 28. Data formats are selected using the format bits, FMT[2:0], in control register 18. The
default data format is 24-bit I
2
S. All formats require binary 2s complement, MSB-first audio data. Figure 27 shows a detailed
timing diagram for the serial audio interface.
PDATA
t(BCH)
50% of VDD
PBCK
PLRCK
t(BCL)
t(LB)
t(BCY)
t(DS)
t(DH)
50% of VDD
50% of VDD
t(BL)
PARAMETERS
MIN
70
MAX
UNITS
ns
t(BCY)
t(BCL)
t(BCH)
t(BL)
t(LB)
t(DS)
t(DH)
—
PBCK pulse cycle time
PBCK pulse duration, LOW
30
ns
PBCK pulse duration, HIGH
30
ns
PBCK rising edge to PLRCK edge
10
ns
PLRCK edge to PBCK rising edge
10
ns
PDATA Setup time
10
ns
PDATA hold time
10
50%
±
2 bit clocks
ns
PLRCK clock data
Figure 27. Timing of Audio Interface
相關PDF資料
PDF描述
DSD1792DB 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
DSD1792DBR 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
DSF10K EMBEDDED PROGRAMMABLE LOGIC FAMILY
DSF11060SG55 16 Characters x 4 Lines, 5x7 Dot Matrix Character and Cursor
DSF11060SG56 16 Characters x 4 Lines, 5x7 Dot Matrix Character and Cursor
相關代理商/技術參數(shù)
參數(shù)描述
DSD1792A 制造商:BB 制造商全稱:BB 功能描述:24-BIT, 192-KHZ SAMPLING, ADVANCED SEGMENT, AUDIO STEREO DIGITAL-TO-ANALOG CONVERTER
DSD1792ADB 功能描述:音頻數(shù)/模轉換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1792ADBG4 功能描述:音頻數(shù)/模轉換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1792ADBR 功能描述:音頻數(shù)/模轉換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1792ADBRG4 功能描述:音頻數(shù)/模轉換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
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