參數(shù)資料
型號: DSD1792DB
元件分類: DAC
英文描述: 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
中文描述: 24位192千赫采樣高級分段音頻立體聲數(shù)模轉(zhuǎn)換器
文件頁數(shù): 36/56頁
文件大?。?/td> 497K
代理商: DSD1792DB
SLES067A MARCH 2003 REVISED AUGUST 2003
www.ti.com
36
Functions Available in the External Digital Filter Mode
The external digital filter mode allows access to the majority of the DSD1792 mode control functions.
The following table shows the register mapping available when the external digital filter mode is selected, along with
descriptions of functions which are modified when using this mode selection.
B15
R/W
B14
0
B13
0
B12
1
B11
0
B10
0
B9
0
B8
0
B7
B6
B5
B4
B3
B2
B1
B0
Register 16
Register 17
Register 18
Register 19
R/W
0
0
1
0
0
0
1
R/W
0
0
1
0
0
1
0
FMT2
FMT1
FMT0
R/W
0
0
1
0
0
1
1
REV
OPE
DFMS
INZD
Register 20
Register 21
R/W
0
0
1
0
1
0
0
SRST
0
1
MONO
CHSL
OS1
OS0
R/W
0
0
1
0
1
0
1
PCMZ
Register 22
NOTE:1: Bit is required for selection of external digital filter mode.
: Function is disabled. No operation even if data bit is set
R
0
0
1
0
1
1
0
ZFGR
ZFGL
FMT[2:0]: Audio Data Format Selection
Default value: 000
FMT[2:0]
000
001
010
Other
Audio Data Format Select
16-bit right-justified format (default)
20-bit right-justified format
24-bit right-justified format
N/A
OS[1:0]: Delta-Sigma Modulator Oversampling Rate Selection
Default value: 00
OS[1:0]
00
01
10
11
Operation Speed Select
8 times WDCK (default)
4 times WDCK
16 times WDCK
Reserved
The effective oversampling rate is determined by the oversampling performed by both the external digital filter and the
delta-sigma modulator. For example, if the external digital filter is 8
×
oversampling, and the user selects
OS[1:0] = 00, then the delta-sigma modulator oversamples by 8
×
, resulting in an effective oversampling rate of 64
×
. The
16
×
WDCK oversampling rate is not available above a 100-kHz sampling rate. If the oversampling rate selected is 16
×
WDCK, the system clock frequency must be over 256 f
S
.
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