參數(shù)資料
型號: DSF10K
廠商: Altera Corporation
英文描述: EMBEDDED PROGRAMMABLE LOGIC FAMILY
中文描述: 嵌入式可編程邏輯系列
文件頁數(shù): 40/138頁
文件大?。?/td> 2116K
代理商: DSF10K
40
Altera Corporation
FLEX 10K Embedded Programmable Logic Family Data Sheet
The instruction register length of FLEX 10K devices is 10 bits. The
USERCODE register length in FLEX 10K devices is 32 bits; 7 bits are
determined by the user, and 25 bits are predetermined.
Tables 14
and
15
show the boundary-scan register length and device IDCODE information
for FLEX 10K devices.
Table 13. FLEX 10K JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins.
Places the 1-bit bypass register between the
TDI
and
TDO
pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation.
Selects the user electronic signature (USERCODE) register and places it between the
TDI
and
TDO
pins, allowing the USERCODE to be serially shifted out of
TDO
.
Selects the IDCODE register and places it between
TDI
and
TDO
, allowing the IDCODE
to be serially shifted out of
TDO
.
These instructions are used when configuring a FLEX 10K device via JTAG ports with a
BitBlaster, ByteBlaster, or ByteBlasterMV download cable, or using a Jam File (
.jam
) or
Jam Byte-Code File (
.jbc
) via an embedded processor.
EXTEST
BYPASS
USERCODE
IDCODE
ICR Instructions
Table 14. FLEX 10K Boundary-Scan Register Length
Device
Boundary-Scan
Register Length
EPF10K10, EPF10K10A
EPF10K20
EPF10K30, EPF10K30A
EPF10K40
EPF10K50, EPF10K50V
EPF10K70
EPF10K100, EPF10K100A
EPF10K130V
EPF10K250A
480
624
768
864
960
1,104
1,248
1,440
1,440
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