參數(shù)資料
型號: EL7155CS-T7
廠商: ELANTEC
元件分類: 外設(shè)及接口
英文描述: High Performance Pin Driver
中文描述: 3.5 A HALF BRIDGE BASED PRPHL DRVR, PDSO8
封裝: SO-8
文件頁數(shù): 10/10頁
文件大?。?/td> 207K
代理商: EL7155CS-T7
9
EL7155C
High-Performance Pin Driver
EL
7155C
Power Supply Bypassing
When using the EL7155C, it is very important to use
adequate power supply bypassing. The high switching
currents developed by the EL7155C necessitate the use
of a bypass capacitor between the VS+ and GND pins. It
is recommended that a 2.2F tantalum capacitor be used
in parallel with a 0.1 F low-inductance ceramic MLC
capacitor. These should be placed as close to the supply
pins as possible. It is also recommended that the VH and
VL pins have some level of bypassing, especially if the
EL7155C is driving highly capacitive loads.
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads,
the EL7155C drive capability is limited by the rise in die
temperature brought about by internal power dissipation.
For reliable operation die temperature must be kept
below Tjmax (125°C). It is necessary to calculate the
power dissipation for a given application prior to select-
ing the package type.
Power dissipation may be calculated:
where:
VS is the total power supply to the EL7155C (from
VS+ to GND),
Vout is the swing on the output (VH - VL),
CL is the load capacitance,
CINT is the internal load capacitance (50pF max.),
IS is the quiescent supply current (3mA max.) and
f is frequency
Having obtained the application’s power dissipation, a
maximum package thermal coefficient may be deter-
mined, to maintain the internal die temperature below
Tjmax:
where:
Tjmax is the maximum junction temperature (125°C),
Tmax is the maximum operating temperature,
PD is the power dissipation calculated above,
θja thermal resistance on junction to ambient.
θja is 160°C/W for the SO8 package and 100°C/W for
the PDIP8 package when using a standard JEDEC
JESD51-3 single-layer test board. If Tjmax is greater than
125°C when calculated using the equation above, then
one of the following actions must be taken:
Reduce
θja the system by designing more heat-sinking
into the PCB (as compared to the standard JEDEC
JESD51-3)
Use the PDIP8 instead of the SO8 package
De-rate the application either by reducing the switch-
ing frequency, the capacitive load, or the maximum
operating (ambient) temperature (Tmax)
PD
V
S
(
I
S )
C
INT
(
V
S
2
f
)
C
L
(
V
OU T
2
f
)
×
+
×
+
×
=
θ
ja
T
jmax
(
T
ma x )
PD
--------------------------------------
=
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