參數(shù)資料
型號(hào)： EP1C6T144I7
廠商： Altera Corporation
英文描述： Cyclone FPGA Family
中文描述： 氣旋FPGA系列
文件頁(yè)數(shù)： 52/94頁(yè)
文件大小： 1138K
代理商： EP1C6T144I7
52
Altera Corporation
Cyclone FPGA Family Data Sheet
Preliminary Information
DDR SDRAM & FCRAM
Cyclone devices have dedicated circuitry for interfacing with DDR
SDRAM. All I/O banks support DDR SDRAM and FCRAM I/O pins.
However, the configuration input pins in bank 1 must operate at 2.5 V
because the SSTL-2 V
CCIO
level is 2.5 V. Additionally, the configuration
output pins (
nSTATUS
and
CONF_DONE
) and all the JTAG pins in I/O
bank 3 must operate at 2.5 V because the V
CCIO
level of SSTL-2 is 2.5 V.
I/O banks 1, 2, 3, and 4 support DQS signals with DQ bus modes of
×
8.
For
×
8 mode, there are up to eight groups of programmable DQS and DQ
pins, I/O banks 1, 2, 3, and 4 each have two groups in the 324-pin and
400-pin FineLine BGA packages. Each group consists of one DQS pin, a set
of eight DQ pins, and one DM pin (see
Figure 33
). Each DQS pin drives the
set of eight DQ pins within that group.
Figure 33. Cyclone Device DQ & DQS Groups in
×
8 Mode
Note (1)
Note to
Figure 33
:
(1)
Each DQ group consists of one DQS pin, eight DQ pins, and one DM pin.
DQ Pins
DQS Pin
DM Pin
Top, Bottom, Left, or Right I/O Bank
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1C6T144I7N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone I 598 LABs 98 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1F 制造商:NEC 制造商全稱:NEC 功能描述:HIGH HEAT RESISTIVITY
EP1F-B3G1 制造商:NEC 制造商全稱:NEC 功能描述:HIGH HEAT RESISTIVITY
EP1FB3G1S 制造商:World Products 功能描述:Electromechanical Relay SPDT 25A 12VDC 225Ohm Through Hole
EP1F-B3G1T 制造商:NEC 制造商全稱:NEC 功能描述:HIGH HEAT RESISTIVITY
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