參數(shù)資料
型號: EP1C6T256I6
廠商: Altera Corporation
英文描述: Cyclone FPGA Family
中文描述: 氣旋FPGA系列
文件頁數(shù): 54/94頁
文件大?。?/td> 1138K
代理商: EP1C6T256I6
54
Altera Corporation
Cyclone FPGA Family Data Sheet
Preliminary Information
Figure 34
illustrates DDR SDRAM and FCRAM interfacing from the I/O
through the dedicated circuitry to the logic array.
Figure 34. DDR SDRAM & FCRAM Interfacing
V
CC
GND
PLL
Phase Shifted -90
DQS
Adjacent LAB LEs
Global Clock
Resynchronizing
Global Clock
Programmable
Delay Chain
Output LE
Register
Output LE
Registers
DQ
Input LE
Registers
Input LE
Registers
LE
Register
LE
Register
t
Adjacent
LAB LEs
OE
OE LE
Register
OE LE
Register
OE
OE LE
Register
OE LE
Register
Output LE
Registers
Output LE
Register
DataA
DataB
clk
-90 clk
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