參數(shù)資料
型號(hào)： EP1K30TI144-2
廠商： Electronic Theatre Controls, Inc.
英文描述： Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN
中文描述： 可編程邏輯器件（992.51十一）
文件頁(yè)數(shù)： 37/86頁(yè)
文件大?。?/td> 992K
代理商： EP1K30TI144-2
Altera Corporation
37
ACEX 1K Programmable Logic Device Family Data Sheet
D
13
T
For designs that require both a multiplied and non-multiplied clock, the
clock trace on the board can be connected to the
GCLK1
pin. In the Altera
software, the
GCLK1
pin can feed both the ClockLock and ClockBoost
circuitry in the ACEX 1K device. However, when both circuits are used,
the other clock pin cannot be used.
ClockLock & ClockBoost Timing Parameters
For the ClockLock and ClockBoost circuitry to function properly, the
incoming clock must meet certain requirements. If these specifications are
not met, the circuitry may not lock onto the incoming clock, which
generates an erroneous clock within the device. The clock generated by
the ClockLock and ClockBoost circuitry must also meet certain
specifications. If the incoming clock meets these requirements during
configuration, the ClockLock and ClockBoost circuitry will lock onto the
clock during configuration. The circuit will be ready for use immediately
after configuration.
Figure 19
shows the incoming and generated clock
specifications.
Figure 19. Specifications for the Incoming & Generated Clocks
Note (1)
Note:
(1)
The
t
I
parameter refers to the nominal input clock period; the
t
O
parameter refers to the nominal output clock
period.
Input
Clock
ClockLock
Generated
Clock
t
CLK1
t
INDUTY
t
I+
t
CLKDEV
t
R
t
F
t
O
t
I+
t
INCLKSTB
t
O
t
O
t
JITTER
t
O+
t
JITTER
t
OUTDUTY
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K30TI144-2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 216 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Logic Device Family
EP1K50FC256-1 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 360 LABs 186 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50FC256-1DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FC256-1F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
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