參數(shù)資料
型號： EP7211
廠商： Cirrus Logic, Inc.
英文描述： HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER
中文描述： 高性能超低功耗系統(tǒng)與LCD控制器芯片
文件頁數(shù)： 69/166頁
文件大?。?/td> 2623K
代理商： EP7211
EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
69
Functional Description
DS352PP3
JUL 2001
In the Standby State, all the system memory and state is maintained and the system time is kept up-
to-date. The PLL/on-chip oscillator or external oscillator is disabled and the system is static, except
for the low power watch crystal (32 kHz) oscillator and divider chain to the RTC and LED flasher.
The
RUN
signal is driven low when in the Standby State. This signal can be used externally in the
system to power down other system modules.
Whenever the EP7211 is in the Standby State, the external address and data buses are driven low.
The
RUN
signal is used internally to force these buses to be driven low. This is done to prevent
peripherals that are powered-down from draining current. Also, the internal peripheral
’
s signals get
set to their Reset State.
When first powered, or reset by the
NPOR
(Not Power On Reset) signal, the EP7211 is forced into
the Standby State. This is known as a cold reset, and is the only completely asynchronous reset to the
EP7211. When leaving the Standby State after a cold reset, external wake up is the only way for
waking up the device. When leaving the Standby State after non-cold reset conditions (i.e., the
software has forced the device into the Standby State), the transition to the Operating State can be
caused by a rising edge on the
WAKEUP
input signal or by an enabled interrupt. Normally, when
entering the Standby State from the Operating State, the software will leave some interrupt sources
enabled. Once the refresh enable register bit is enabled for the DRAMs, any transition to the Standby
State will force the DRAMs to the self-refresh state before stopping the PLL or external oscillator.
Table 3-15. Peripheral Status in Different Power Management States
Address (W/B)
Operating
Idle
Standby
NPOR
RESET
NRESET
RESET
DRAM Control
On
On
SELFREF
Off
SELFREF
UARTs
On
On
Off
Reset
Reset
LCD FIFO
On
On
Reset
Reset
Reset
LCD
On
On
Off
Reset
Reset
ADC Interface
On
On
Off
Reset
Reset
SSI2 Interface
On
On
Off
Reset
Reset
MCP Interface
On
On
Off
Reset
Reset
Codec
On
On
Off
Reset
Reset
Timers
On
On
Off
Reset
Reset
RTC
On
On
On
On
On
LED Flasher
On
On
On
Reset
Reset
DC-to-DC
On
On
Off
Reset
Reset
CPU
On
Off
Off
Reset
Reset
Interrupt Control
On
On
On
Reset
Reset
PLL/CLKEN Signal
On
On
Off
Off
Off
相關(guān)PDF資料
PDF描述
EP7211-CP-A HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER
EP7211-CV-A HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER
EP7212 HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7212-CB-A HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7212-CV-A HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
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EP7211-CP-A 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER
EP7211-CV-A 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER
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