參數(shù)資料
型號(hào): EP7212
廠商: Cirrus Logic, Inc.
英文描述: HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
中文描述: 高性能,低功耗系統(tǒng)與LCD控制器和數(shù)字音頻接口(DAI芯片)
文件頁(yè)數(shù): 17/136頁(yè)
文件大?。?/td> 2289K
代理商: EP7212
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EP7212
DS474PP1
17
General
Purpose I/O
PA[0:7]
I/O
Port A I/O (bit 6 for boot clock option, bit 7 for CL-PS6700 PRDY input); also
used as keyboard row inputs
Port B I/O. All eight Port B bits can be used as GPIOs.
When the PC CARD1 or 2 control bits in the SYSCON2 register are de-
asserted, PB[0] and PB[1] are available for GPIO. When asserted, these port
bits are used as the PRDY signals for connected CL-PS6700 PC Card Host
Adapter devices.
Port D I/O
Port E I/O (3 bits only). Can be used as general purpose I/O during normal
operation.
During power-on reset, PE[0] and PE[1] are inputs and are latched by the ris-
ing edge of nPOR to select the memory width that the EP7212 will use to read
from the boot code storage device (i.e., external 8-bit-wide FLASH bank).
During power-on reset, PE[2] is latched by the rising edge of nPOR to select
the clock mode of operation (i.e., either the PLL or external 13 MHz clock
mode).
PWM drive outputs. These pins are inputs on power up to determine what
polarity the output of the PWM should be when active. Otherwise, these pins
are always an output (See
Table 6
).
PWM feedback inputs
JTAG data in
JTAG data out
JTAG mode select
JTAG clock
JTAG async reset
Test mode select inputs. These pins are used in conjunction with the power-on
latched state of nURESET to select between the various device test models.
Main 3.6864 MHz oscillator for 18.432 MHz–73.728 MHz PLL
PB[0]/PRDY1
PB[1]/PRDY2
PB[2:7]
I/O
PD[0:7]
PE[0]/
BOOTSEL[0]
PE[1]/
BOOTSEL[1]
I/O
I/O
I/O
PE[2]/
CLKSEL
I/O
PWM
Drives
DRIVE[0:1]
I/O
FB[0:1]
TDI
TDO
TMS
TCLK
nTRST
nTEST[0:1]
I
I
Boundary
Scan
O
I
I
I
I
Test
Oscillators
MOSCIN
MOSCOUT
RTCIN
RTCOUT
N/C
I
O
I
O
Real Time Clock 32.768 kHz oscillator
No Connects
No connects should be left as no connects; do not connect to ground
1. All deglitched inputs are via the 16.384 kHz clock. Each deglitched signal must be held active for at least two clock periods. Therefore, the
input signal must be active for at least ~125
μ
s to be detected cleanly.
The RTC crystal must be populated for the device to function properly.
Function
Signal
Name
Signal
Description
Table 4. External Signal Functions
(cont.)
相關(guān)PDF資料
PDF描述
EP7212-CB-A HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7212-CV-A HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7309 HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE
EP7309-CB-C CONN MODULAR JACK 8-8 R/A UNSHLD
EP7309-CR-C HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP7212-CB-A 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7212-CV-A 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7212-CV-D 制造商:Rochester Electronics LLC 功能描述:- Bulk
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EP7236 功能描述:電氣外殼配件 E-PANEL FITS 72 X 36 RoHS:否 制造商:Hammond Manufacturing 產(chǎn)品:Rack Accessories 類型: 面板寬度: 面板高度: 外部寬度: 外部高度: 外部深度: 顏色:Black