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參數(shù)資料
| 型號(hào)： | EPA445-9 |
| 英文描述： | Tapped Delay Line |
| 中文描述： | 抽頭延遲線 |
| 文件頁數(shù)： | 1/1頁 |
| 文件大小： | 12K |
| 代理商： | EPA445-9 |
8 Pin DIP Dual TTL Compatible Active Delay Lines
VOH
High-Level Output Voltage
V CC= min. VIL= max. IOH = max 2.7
V
VOL
Low-Level Output Voltage
V CC= min. VIH = min. IOL= max
0.5
V
VIK
Input Clamp Voltage
V CC= min. II = IIK
-1.2V
V
IIH
High-Level Input Current
V CC= max. VIN = 2.7V
50
A
V CC= max. VIN = 5.25V
1.0
mA
IIL
Low-Level Input Current
V CC= max. VIN = 0.5V
-2
mA
IOS
Short Circuit Output Current V CC= max. VOUT = 0.
-40
-100
mA
(One output at a time)
ICCH High-Level Supply Current
V CC= max. VIN = OPEN
90
mA
ICCL Low-Level Supply Current
V CC= max. VIN = 0
90
mA
TRO
Output Rise Time
4
nS
NH
Fanout High-Level Output
V CC= max. VOH = 2.7V
20 TTL LOAD
NL
Fanout Low-Level Output
V CC= max. VOL = 0.5V
10 TTL LOAD
DC Electrical Characteristics
Parameter
Test Conditions
Min
Max Unit
Schematic
Package Dimensions
VCC
Supply Voltage
4.75
5.25
V
VIH
High-Level Input Voltage
2.0
V
VIL
Low-Level Input Voltage
0.8
V
IIK
Input Clamp Current
-18
mA
IOH
High-Level Output Current
-1.0
mA
IOL
Low-Level Output Current
20
mA
PW*
Pulse Width of Total Delay
40
%
d*
Duty Cycle
40
%
TA
Operating Free-Air Temperature
0
+70
°C
*These two values are inter-dependent.
Recommended
Operating Conditions
Min
Max
Unit
EIN
Pulse Input Voltage
3.2
Volts
PW
Pulse Width % of Total Delay
110
%
TRI
Pulse Rise Time (0.75 - 2.4 Volts)
2.0
nS
PRR
Pulse Repetition Rate
1.0
MHz
VCC
Supply Voltage
5.0
Volts
Input Pulse Test Conditions @ 25° C
Unit
DSA445 8/25/94
QAF-CSO1 Rev. B 8/25/94
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030
.XXX = ± .010
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
E L E C T R O N I C S
I N C .
DELAY TIME*
PART
DELAY TIME*
NUMBER
5 ± 1
EPA445-5
6 ± 1
EPA445-6
19
7 ± 1
EPA445-7
20
8 ± 1
EPA445-8
21
9 ± 1
EPA445-9
22
10 ± 1.5
EPA445-10
23
11 ± 1.5
EPA445-11
24
12 ± 1.5
EPA445-12
25
13 ± 1.5
EPA445-13
30
14 ± 1.5
EPA445-14
35
15
EPA445-15
40
16
EPA445-16
45
17
EPA445-17
50
PART
DELAY TIME*
PART
NUMBER
EPA445-18
55
EPA445-55
EPA445-19
60
EPA445-60
EPA445-20
65
EPA445-65
EPA445-21
70
EPA445-70
EPA445-22
75
EPA445-75
EPA445-23
80
EPA445-80
EPA445-24
85
EPA445-85
EPA445-25
90
EPA445-90
EPA445-30
95
EPA445-95
EPA445-35
100
EPA445-100
EPA445-40
150
EPA445-150
EPA445-45
200
EPA445-200
EPA445-50
250
EPA445-250
Delay Times referenced from input to leading edges at 25°C, 5.0V, with no load.
* Unless otherwise specified, delay tolerance is ± 2 nS or ± 5%, whichwver is greater.
18
8
75
4
GROUND
8
VCC
1
.250
Max.
.365
Max.
.100
Typ.
.500
.280
PCA
EPA455-5
Date Code
.
.020
Typ.
.010
Typ.
Max.
.120 Min.
.020
Typ.
Max.
WHITE DOT
PIN#1
All unused pins are omitted.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EPA445-90 | Tapped Delay Line |
| EPA445-95 | Tapped Delay Line |
| EPA460-100 | Tapped Delay Line |
| EPA460-1000 | Tapped Delay Line |
| EPA460-125 | Tapped Delay Line |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EPA445-90 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line |
| EPA445-90-LF | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:8 Pin DIP Dual TTL Compatible Active Delay Lines |
| EPA445-95 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:8 Pin DIP Dual TTL Compatible Active Delay Lines |
| EPA445-95-LF | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:8 Pin DIP Dual TTL Compatible Active Delay Lines |
| EPA460 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision |
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