參數(shù)資料
型號: EPA770-150
英文描述: Delay Line
中文描述: 延遲線
文件頁數(shù): 1/1頁
文件大小: 13K
代理商: EPA770-150
E L E C T R O N I C S
I N C .
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
8 Pin DIP 5 Tap Fast-TTL Logic
Compatible Active Delay Lines
Package Dimensions
VCC
Supply Voltage
4.75
5.25
V
VIH
High-Level Input Voltage
2.0
V
VIL
Low-Level Input Voltage
0.8
V
IIK
Input Clamp Current
-18
mA
IOH
High-Level Output Current
-1.0
mA
IOL
Low-Level Output Current
20
mA
PW*
Pulse Width of Total Delay
40
%
d*
Duty Cycle
40
%
TA
Operating Free-Air Temperature
0
+70
°C
VOH High-Level Output Voltage
VCC= min. VIL= max. I OH = max 2.7
V
VOL
Low-Level Output Voltage
VCC= min. VIH = min. I OL= max
0.5
V
VIK
Input Clamp Voltage
VCC= min. II = IIK
-1.2
V
IIH
High-Level Input Current
VCC= max. V IN = 2.7V
50
A
VCC= max. V IN = 5.25V
1.0
mA
IIL
Low-Level Input Current
VCC= max. V IN = 0.5V
-0.6
mA
IOS
Short Circuit Output Current VCC= max. V OUT = 0.
-40
-150
mA
(One output at a time)
ICCH High-Level Supply Current
VCC= max. V IN = OPEN
15
mA
ICCL Low-Level Supply Current
VCC= max. V IN = 0
50
mA
TRO
Output Rise Time
Td
≤ 500 nS (0.75 to 2.4 Volts)
3
nS
Td > 500 nS
3
nS
NH
Fanout High-Level Output
VCC= max. V OH = 2.7V
20 TTL LOAD
NL
Fanout Low-Level Output
VCC= max. V OL = 0.5V
10 TTL LOAD
DC Electrical Characteristics
Parameter
Test Conditions
Min
Max Unit
Recommended
Operating Conditions
Min
Max
Unit
EIN
Pulse Input Voltage
3.2
Volts
PW
Pulse Width % of Total Delay
110
%
TRI
Pulse Rise Time (0.75 - 2.4 Volts)
2.0
nS
PRR
Pulse Repetition Rate @ Td
≤ 200 nS
1.0
MHz
Pulse Repetition Rate @ Td > 200 nS
100
KHz
VCC
Supply Voltage
5.0
Volts
Input Pulse Test Conditions @ 25° C
Unit
*These two values are inter-dependent.
Schematic
TAP DELAYS
TOTAL DELAYS
PART
±5% or ±2 nS
NUMBER
*1, 2, 3 (±0.5)
4±1.0
EPA770-4
*2, 4, 6 (±1.0)
8
EPA770-8
*3, 6, 9 (±1.0)
12
EPA770-12
4, 8, 12, 16 (±1.5)
20
EPA770-20
5, 10, 15, 20
25
EPA770-25
10, 20, 30, 40
50
EPA770-50
12, 24, 36, 48
60
EPA770-60
15, 30, 45, 60
75
EPA770-75
20, 40, 60, 80
100
EPA770-100
25, 50, 75, 100
125
EPA770-125
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
TAP DELAYS
TOTAL DELAYS
PART
±5% or ±2 nS
NUMBER
30, 60, 90, 120
150
EPA770-150
35, 70, 105, 140
175
EPA770-175
40, 80, 120, 160
200
EPA770-200
45, 90, 135, 180
225
EPA770-225
50, 100, 150, 200
250
EPA770-250
60, 120, 180, 240
300
EPA770-300
70, 140, 210, 280
350
EPA770-350
80, 160, 240, 320
400
EPA770-400
90, 180, 270, 360
450
EPA770-450
100, 200, 300, 400
500
EPA770-500
*Delay times referenced from 1st tap. 1st tap is the inherent delay (3.5ns ±1nS)
EPA770 07/94
7
2
6
3
5
1
4
OUTPUT
GROUND
INPUT
8
VCC
.365
Max.
.500 Max.
.280
Max.
PCA
EPA770-4
D.C.
.010
Typ.
.120 Min,
.020
Typ.
.275
Max.
.020
Typ.
White Dot
Pin#1
.100
相關(guān)PDF資料
PDF描述
EPA770-175 Delay Line
EPA770-20 Delay Line
EPA770-200 Delay Line
EPA770-225 Delay Line
EPA770-25 Delay Line
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參數(shù)描述
EPA770-175 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line
EPA770-20 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line
EPA770-200 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line
EPA770-225 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line
EPA770-25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line