參數(shù)資料
型號: EPF10K50S
英文描述: Programmable Logic
中文描述: 可編程邏輯
文件頁數(shù): 82/138頁
文件大小: 2116K
代理商: EPF10K50S
48
Altera Corporation
FLEX 10K Embedded Programmable Logic Family Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may
undershoot to –2.0 V or overshoot to 5.75 V for input currents less than 100 mA and
periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial-temperature-range devices.
(4)
Maximum VCC rise time is 100 ms. VCC must rise monotonically.
(5)
EPF10K50V and EPF10K130V device inputs may be driven before VCCINT and
VCCIO are powered.
(6)
Typical values are for TA = 25° C and VCC = 3.3 V.
(7)
These values are specified under the EPF10K50V and EPF10K130V device
recommended operating conditions in Table 23 on page 47.
(8)
The IOH parameter refers to high-level TTL or CMOS output current.
(9)
The IOL parameter refers to low-level TTL or CMOS output current. This parameter
applies to open-drain pins as well as output pins.
(10) This parameter applies to -1 speed grade EPF10K50V devices, -2 speed grade
EPF10K50V industrial temperature devices, and -2 speed grade EPF10K130V
devices.
(11) Capacitance is sample-tested only.
Figure 21 shows the typical output drive characteristics of EPF10K50V
and EPF10K130V devices.
Figure 21. Output Drive Characteristics of EPF10K50V & EPF10K130V Devices
Table 25. EPF10K50V & EPF10K130V Device Capacitance
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance
VIN = 0 V, f = 1.0 MHz
10
pF
CINCLK Input capacitance on dedicated
clock pin
VIN = 0 V, f = 1.0 MHz
15
pF
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
10
pF
VO Output Voltage (V)
1
2
3
20
40
60
IOH
Vcc = 3.3 V
Room Temperature
IOL
Typical IO
Output
Current (mA)
相關PDF資料
PDF描述
EPF10K50SQC240-2 Field Programmable Gate Array (FPGA)
EPF10K50SQC240-2X Field Programmable Gate Array (FPGA)
EPA810-80 Tapped Delay Line
EPA810-800 Tapped Delay Line
EPA810-85 Tapped Delay Line
相關代理商/技術參數(shù)
參數(shù)描述
EPF10K50SBC356-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 220 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50SBC356-1X 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 220 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50SBC356-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 220 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50SBC356-2X 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 220 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50SBC356-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 220 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256