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118
Altera Corporation
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Notes to tables:
(1)
The EPM7512B device in the 208-pin PQFP package supports vertical migration from the EPM7256E, EPM7256S,
and EPM7256B devices. The EPM7512B device contains additional I/O pins which are no connects on the
EPM7256E, EPM7256S, and EPM7256B devices. To support these additional I/O pins, the EPM7512B device has two
additional
VCCIO
(pins 105 and 207) and
GNDIO
(pins 51 and 158) pins that are no-connect pins on the EPM7256E,
EPM7256S, and EPM7256B devices. To achieve vertical migration between the EPM7256B and EPM7512B devices,
the no-connect pins 105 and 207 may be tied to
VCCIO
, and pins 51 and 158 may be tied to
GNDIO
on the EPM7256B
devices. On the EPM7256E and EPM7256S devices, these no-connect pins must not be tied to
VCCIO
or
GNDIO
.
EPM7512B devices have identical pin-outs.
(2)
This pin may function as either a JTAG port or a user I/O pin. If the device is configured to use the JTAG ports for
in-system programming, this pin is not available as a user I/O pin.
(3)
The user I/O pin count includes dedicated input pins and all I/O pins.
Figures 20
through
27
show the package pin-out diagrams for
MAX 7000B devices.
Figure 20. 44-Pin PLCC/TQFP Package Pin-Out Diagram
Package outlines not drawn to scale.
44-Pin PLCC
I
I
I
V
I
I
I
I
G
I
I
I/O
I/O/TDO
I/O
I/O
VCC
I/O
I/O
I/O/TCK
I/O
GND
I/O
I
I
I
I
G
V
I
I
I
I
I
6 5 4 3 2 1 44 43 42 41 40
18 19 20 21 22 23 24 25 26 27 28
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
EPM7032B
EPM7064B
I/O/TDI
I/O
I/O
GND
I/O
I/O
I/O/TMS
I/O
VCC
I/O
I/O
44-Pin TQFP
Pin 12
Pin 23
Pin 34
Pin 1
I
I
I
V
I
I
I
I
G
I
I
I/O
I/O/TDO
I/O
I/O
VCC
I/O
I/O
I/O/TCK
I/O
GND
I/O
I
I
I
I
G
V
I
I
I
I
I
I/O/TDI
I/O
I/O
GND
I/O
I/O
I/O/TMS
I/O
VCC
I/O
I/O
EPM7032B
EPM7064B