參數(shù)資料
型號: EPM7128E
廠商: Altera Corporation
英文描述: Programmable Logic Device Family
中文描述: 可編程邏輯器件系列
文件頁數(shù): 3/62頁
文件大小: 1173K
代理商: EPM7128E
Altera Corporation
3
MAX 7000 Programmable Logic Device Family Data Sheet
Additional design entry and simulation support provided by EDIF
200 and 30 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, and VeriBest
Programming support
Altera’s Master Programming Unit (MPU) and programming
hardware from third-party manufacturers program all
MAX 7000 devices
The BitBlaster
TM
serial download cable, ByteBlasterMV
TM
parallel port download cable, and MasterBlaster
TM
serial/ universal serial bus (USB) download cable program MAX
7000S devices
General
Description
The MAX 7000 family of high-density, high-performance PLDs is based
on Altera’s second-generation MAX architecture. Fabricated with
advanced CMOS technology, the EEPROM-based MAX 7000 family
provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns,
and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6,
-7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in
-5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest
Group (PCI SIG)
PCI Local Bus Specification
,
Revision 2.2
. See
Table3
for available speed grades.
Table 3. MAX 7000 Speed Grades
Device
Speed Grade
-5
-6
-7
-10P
-10
-12P
-12
-15
-15T
-20
EPM7032
v
v
v
v
v
v
EPM7032S
v
v
v
v
EPM7064
v
v
v
v
v
EPM7064S
v
v
v
v
EPM7096
v
v
v
v
EPM7128E
v
v
v
v
v
v
EPM7128S
v
v
v
v
EPM7160E
v
v
v
v
v
EPM7160S
v
v
v
v
EPM7192E
v
v
v
v
EPM7192S
v
v
v
EPM7256E
v
v
v
v
EPM7256S
v
v
v
相關(guān)PDF資料
PDF描述
EPM7128S Programmable Logic Device Family
EPM7160E Programmable Logic Device Family
EPM7160S Programmable Logic Device Family
EPM7192E Programmable Logic Device Family
EPM7192S Programmable Logic Device Family
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7128ELC84-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7128ELC8412 制造商:Altera Corporation 功能描述:
EPM7128ELC84-12 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7128ELC8415 制造商:Altera Corporation 功能描述:
EPM7128ELC84-15 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100