參數(shù)資料
型號： EPM7512B
廠商： Altera Corporation
英文描述： Programmable Logic Device Family(MAX7000B可編程邏輯系列器件)
中文描述： 可編程邏輯器件系列（MAX7000B可編程邏輯系列器件）
文件頁數(shù)： 19/125頁
文件大?。?/td> 1053K
代理商： EPM7512B
Altera Corporation
19
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Note:
(1)
Timing parameters in this table apply to all VCCIO levels.
Programmable
Speed/Power
Control
MAX 7000B devices offer a power-saving mode that supports low-power
operation across user-defined signal paths or the entire device. This
feature allows total power dissipation to be reduced by 50
%
or more,
because most logic applications require only a small fraction of all gates to
operate at maximum frequency.
The designer can program each individual macrocell in a MAX 7000B
device for either high-speed or low-power operation. As a result, speed-
critical paths in the design can run at high speed, while the remaining
paths can operate at reduced power. Macrocells that run at low power
incur a nominal timing delay adder (
t
LPA
) for the
t
LAD
,
t
LAC
,
t
IC
,
t
ACL
,
t
CPPW
,
t
EN
, and
t
SEXP
parameters.
Output
Configuration
MAX 7000B device outputs can be programmed to meet a variety of
system-level requirements.
MultiVolt I/O Interface
The MAX 7000B device architecture supports the MultiVolt I/ O interface
feature, which allows MAX 7000B devices to connect to systems with
differing supply voltages. MAX 7000B devices in all packages can be set
for 3.3-V, 2.5-V, or 1.8-V pin operation. These devices have one set of V
CC
pins for internal operation and input buffers (
VCCINT
), and another set for
I/ O output drivers (
VCCIO
).
The
VCCIO
pins can be connected to either a 3.3-V, 2.5-V, or 1.8-V power
supply, depending on the output requirements. When the
VCCIO
pins are
connected to a 1.8-V power supply, the output levels are compatible with
1.8-V systems. When the
VCCIO
pins are connected to a 2.5-V power
supply, the output levels are compatible with 2.5-V systems. When the
VCCIO
pins are connected to a 3.3-V power supply, the output high is at
3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices
operating with V
CCIO
levels of 2.5 V or 1.8 V incur a nominal timing delay
adder.
Table 8
describes the MAX 7000B MultiVolt I/ O support.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7512BBC256-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BBC256-5 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BBC256-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BBI256-7 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述:
EPM7512BFC256-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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