參數(shù)資料
型號(hào)： EPM9320A
廠商： Altera Corporation
英文描述： Programmable Logic Device Family(MAX9000可編程邏輯系列器件)
中文描述： 可編程邏輯器件系列（MAX9000可編程邏輯系列器件）
文件頁(yè)數(shù)： 6/41頁(yè)
文件大?。?/td> 604K
代理商： EPM9320A
6
Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
Figure 1. MAX 9000 Device Block Diagram
Logic Array Blocks
The MAX 9000 architecture is based on linking high-performance, flexible
logic array modules called logic array blocks (LABs). LABs consist of
16-macrocell arrays that are fed by the LAB local array, as shown in
Figure 2 on page 7
. Multiple LABs are linked together via the FastTrack
Interconnect, a series of fast, continuous channels that run the entire
length and width of the device. The I/O pins are supported by I/O cells
(IOCs) located at the end of each row (horizontal) and column (vertical)
path of the FastTrack Interconnect.
Each LAB is fed by 33 inputs from the row interconnect and 16 feedback
signals from the macrocells within the LAB. All of these signals are
available within the LAB in their true and inverted form. In addition,
16 shared expander product terms (“expanders”) are available in their
inverted form, for a total of 114 signals that feed each product term in the
LAB. Each LAB is also fed by two low-skew global clocks and one global
clear that can be used for register control signals in all 16 macrocells.
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
IOC
I/O Cell
(IOC)
Logic Array
Block (LAB)
Macrocell
FastTrack
Interconnect
IOC
IOC
LAB Local Array
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM9320ABC356-10 制造商:Rochester Electronics LLC 功能描述:- Bulk
EPM9320ABI356-10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM9320ALC84-10 制造商:Altera Corporation 功能描述:IC MAX
EPM9320ALC84-10N 制造商:Altera Corporation 功能描述:IC MAX
EPM9320ALI84-10 制造商:Altera Corporation 功能描述:IC MAX 84PLCC 制造商:Altera Corporation 功能描述:IC CPLD 320MC 10NS 84PLCC
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