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參數(shù)資料
| 型號(hào)： | EV4101 |
| 廠商： | LSI Corporation |
| 英文描述： | 32-bit Microprocessor that Executes MIPS I,a Subset of MIPS II,and a Subset of the MIPS16 Instructions.(32位微處理器（執(zhí)行MIPS I,MIPS II的子集,MIPS16的子集指令）) |
| 中文描述： | 32位微處理器中執(zhí)行MIPS的我，一個(gè)子集的MIPS的第二，以及對(duì)MIPS16指令集。（32位微處理器（執(zhí)行MIPS的我，MIPS的二的子集，MIPS16的子集指令）） |
| 文件頁(yè)數(shù)： | 13/68頁(yè) |
| 文件大小： | 545K |
| 代理商： | EV4101 |
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TinyRISC
EV4101 Microprocessor Reference Device Technical Summary
13
Table 5 shows the format of the BPCM Register.
BDAM Register (21) –
The Breakpoint Data Address Mask (BDAM)
Register masks bits in the BDA Register. Writing a 1 to bit n of the BDAM
Register enables the bitwise comparison of bit n in the BDA Register with
bit n in the data reference address. Conversely, writing a 0 to bit n of the
BDAM Register disables the comparison, and forces the breakpoint logic
to assume a match between bit n in the BDA and bit n in the data
reference address regardless of the true result. The BDAM Register
contents are undefined after reset.
Table 6 shows the format of the BDAM Register.
4.1.2 Instructions
The MFD and MTD instructions access the DBX registers. These
instructions use the FlexLink interface of the TR4101 and are not
supported by compilers or assemblers. The following macros may be
used to enable the MFD and MTD instructions:
#define MFD(rt,dr).word0x7C000000 + (rt << 16) + (dr << 11)
#define MTD(rs,dr).word0x78000000 + (rs << 21) + (dr << 11)
MFD Instruction –
The Move From Debug (MFD) Instruction loads the
contents of DBX Register
dr
into a General Register
rt
. This instruction
is only valid if
dr
= 7, 18, 19, 20, or 21. All other
dr
values are undefined.
The values for each Debug Register
dr
are indicated in parentheses in
the subsection headings.
Operation: T: GPR[rt] <- DEBUG[dr]
Exceptions: None
Table 5
BPCM Register
31
1
0
Breakpoint Program Counter Mask
M
Table 6
BDAM Register
31
0
Breakpoint Data Address Mask
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