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參數(shù)資料
| 型號： | EVAL-AD1994EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Audio Switching Amplifier |
| 中文描述： | 音頻開關(guān)放大器 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 377K |
| 代理商： | EVAL-AD1994EB |
AD1994
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 6 of 24
PIN 1
INDICATOR
1
E
1
E
1
M
2
M
2
D
2
D
2
D
2
D
2
D
2
D
2
C
2
C
2
M
3
R
3
P
3
P
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
4
M
N
N
N
A
N
M
A
A
R
N
A
N
N
N
M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PGND1
PGND1
PGND1
OUTL+
OUTL+
OUTL+
PVDD1
PVDD1
PVDD1
PVDD1
OUTL–
OUTL–
OUTL–
PGND1
PGND1
PGND1
NC = NO CONNECT
PGND2
PGND2
PGND2
OUTR+
OUTR+
OUTR+
PVDD2
PVDD2
PVDD2
PVDD2
OUTR–
OUTR–
OUTR–
PGND2
PGND2
PGND2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AD1994
TOP VIEW
(Not to Scale)
0
Figure 3. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
1, 2, 3
PGND1
4, 5, 6
OUTL+
7, 8, 9, 10
PVDD1
11, 12, 13
OUTL
14, 15, 16
PGND1
17
ERR2
18
ERR1
19
MODL/ERR0
20
MODR/DCTRL2
21
DCTRL1
22
DCTRL0
23, 26
DGND
24, 25
DVDD
27
CLKI
28
CLKO
29
MUTE
30
RESET
31
PGA1
32
PGA0
33, 34, 35
PGND2
36, 37, 38
OUTR
39, 40, 41, 42
PVDD2
43, 44, 45
OUTR+
46, 47, 48
PGND2
49
MOD_EN
In/Out
O
O
O
O
O
I/O
I
I
I
O
I
I
I
I
O
O
I
Description
Negative Power Supply. Used for the A2 and B2 high power transistors.
Output of Transistor Pair A1 and A2.
Positive Power Supply. Used for the A1 and B1 high power transistors.
Output of Transistor Pair B1 and B2.
Negative Power Supply. Used for the A2 and B2 high power transistors.
Active Low Thermal Shutdown.
Active Low Thermal Warning Error Output.
Active Low Overcurrent Error Output/Modulator Output Left.
Nonoverlap Time Setting MSB/Modulator Output Right.
Nonoverlap Time Setting.
Nonoverlap Time Setting LSB.
Negative Power Supply for Low Power Digital Circuitry.
Positive Power Supply for Low Power Digital Circuitry.
Clock Input for 256 × f
S
Audio Modulator Clock.
Inverted Version of CLKI for Use with an External XTAL Oscillator.
Active Low Mute Input.
Active Low Reset Input.
PGA Gain Control MSB.
PGA Gain Control LSB.
Negative Power Supply for High Power Transistors C2 and D2.
Output of Transistor Pair D1 and D2.
Positive Power Supply for High Power Transistors C1 and D1.
Output of Transistor Pair C1 and C2.
Negative Power Supply for High Power Transistors C2 and D2.
Modulator Mode Enable Pin when Pulled to Logic High.
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