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參數(shù)資料
| 型號： | EVAL-AD9834EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power, +2.3 V to +5.5 V, 50 MHz Complete DDS |
| 中文描述： | 低功耗，2.3 V至5.5 V，50 MHz的完整的DDS |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 236K |
| 代理商： | EVAL-AD9834EB |
AD9834
–
13
–
REV PrM
PRELIMINARY TECHNICAL DATA
Table 8: Writing 3FFF to the 14 LSBs of FREQ1 REG
SDATA input
Result of input word
0000 0000 0000 0000
Control word write (D15, D14 = 00);
B28 (D13) = 0; HLB (D12) = 0, i.e. LSBs
FREQ1 REG write (D15, D14 = 10);
14 LSBs = 3FFF
1011 1111 1111 1111
Table 9: Writing 3FFF to the 14 MSBs of FREQ0 REG
SDATA input
Result of Input word
0001 0000 0000 0000
Control word write (D15, D14 = 00);
B28 (D13) = 0; HLB (D12) = 1, i.e. MSBs
FREQ0 REG write (D15, D14 = 01);
14 MSBs = 3FFF
0111 1111 1111 1111
Writing to a Phase Register:
When writing to a phase register, bits D15 and D14 are
set to 11. Bit D13 identifies which phase register is being
loaded.
Table 10. Phase Register Bits
D15 D14
D13
D12
D11
D0
1
1
1
1
0
1
X
X
MSB
MSB
12 PHASE0 BITS
12 PHASE1 BITS
LSB
LSB
The RESET Function
The RESET function resets appropriate internal registers
to zero to provide an analog output of midscale. RESET
does not reset the phase, frequency or control registers.
When the AD9834 is powered up, the part should be re-
set. To reset the AD9834, set the RESET pin/bit to 1. To
take the part out of reset, set the pin/bit to 0. A signal will
appear at the DAC output 7 MCLK cycles after RESET is
set to 0.
The RESET function is controlled by both the RESET
pin and the RESET control bit. If the control bit PIN/SW
= 0, the RESET bit controls the function, whereas if PIN/
SW = 1, the pin control the function.
Table 11: Applying RESET
RESET pin
RESET bit
PIN/SW
Result
0
1
X
X
X
X
0
1
1
1
0
0
No Reset Applied
Internal Registers Reset
No Reset Applied
Internal Registers Reset
The effect of asserting the RESET pin is seen immedi-
ately at the output, i.e. the zero to one transition of this
pin is not sampled. However, the negative transition of
RESET is sampled on the internal falling edge of MCLK.
The Sleep Function
Sections of the AD9834 which are not in use can be pow-
ered down minimise power consumption. This is done
using the Sleep Function. The parts of the chip that can
be powered down are the Internal clock and the DAC.
The DAC can be powered down through hardware or
software. The pin/bits required for the Sleep Function are
outlined in Table 12.
Table 12: Applying the SLEEP Funct
i
on
SLEEP
pin
SLEEP1 SLEEP12
bit
PIN/SW
bit
Result
bit
0
1
X
X
X
X
X
X
0
0
1
1
X
X
0
1
0
1
1
1
0
0
0
0
No powerdown
DAC Powered Down
No powerdown
DAC Powered Down
Internal Clock disabled
Both the DAC powered
down and the Internal
Clock disabled
DAC Powered Down:
This is useful when the AD9834 is
used to output the MSB of the DAC data only. In this
case, the DAC is not required so it can be powered down
to reduce power consumption.
Internal Clock disabled:
When the internal clock of the
AD9834 is disabled the DAC output will remain at its
present value as the NCO is no longer accumulating. New
frequency, phase and control words can be written to the
part when the SLEEP1 control bit is active. The
synchronising clock is still active which means that the
selected frequency and phase registers can also be changed
either at the pins or by using the control bits. Setting the
SLEEP1 bit equal to 0 enables the MCLK. Any changes
made to the registers while SLEEP1 was active will be
seen at the output after a certain latency.
The effect of asserting the SLEEP pin is seen immediately
at the output, i.e. the zero to one transition of this pin is
not sampled. However, the negative transition of SLEEP
is sampled on the internal falling edge of MCLK.
The SIGN BIT OUT Pin
The AD9834 offers a variety of outputs from the chip.
The digital outputs are available from the SIGN BIT
OUT pin. The available outputs are the comparator out-
put or the MSB of the DAC data.
This pin must be enabled before use. The enabling/dis-
abling of this pin is controlled by the bit OPBITEN (D5)
in the control register. When OPBITEN = 1, this pin is
enabled. Note that the MODE bit (D1) in the control
register should be set to '0' if OPBITEN = '1'.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD9834EBZ | 制造商:Analog Devices 功能描述:Evaluation Kit For 20 MW Power, 2.3 V To 5.5 V, 75 MHz Complete DDS 制造商:Analog Devices 功能描述:EVAL KIT FOR 20 MW PWR, 2.3V TO 5.5 V, 75 MHZ COMPLETE DDS - Bulk |
| EVAL-AD9834SDZ | 功能描述:BOARD EVAL FOR AD9834 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
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