參數(shù)資料
型號： EVAL-ADE7756EB
廠商： Analog Devices, Inc.
英文描述： Active Energy Metering IC with Serial Interface
中文描述： 有源電能計量IC串行接口
文件頁數(shù)： 27/32頁
文件大小： 347K
代理商： EVAL-ADE7756EB
REV. 0
ADE7756
–27–
wide, for example, a 2-byte data transfer must take place. The
data is always assumed to be right justified, therefore, in this case,
the 4 MSBs of the first byte would be ignored and the 4 LSBs of
the first byte written to the ADE7756 would be the 4 MSBs of
the 12-bit word. Figure 39 illustrates this example.
Serial Read Operation
During a data read operation from the ADE7756, data is shifted
out at the DOUT logic output on the rising edge of SCLK. As
was the case with the data write operation, a data read must be
preceded with a write to the Communications register.
With the ADE7756 in Communications Mode (i.e.,
CS
logic
low) an 8-bit write to the Communications register first takes
place. The MSB of this byte transfer is a 0, indicating that the
next data transfer operation is a read. The LSBs of this byte
contain the address of the register to be read. The ADE7756
starts shifting out of the register data on the next rising edge of
SCLK—see Figure 40. At this point the DOUT logic output
leaves its high impedance state and starts driving the data bus.
All remaining bits of register data are shifted out on subsequent
SCLK rising edges. The serial interface also enters Communi-
cations Mode again as soon as the read has been completed. At
this point the DOUT logic output enters a high impedance state
on the falling edge of the last SCLK pulse. The read operation
may be aborted by bringing the
CS
logic input high before
the data transfer is complete. The DOUT output enters a high
impedance state on the rising edge of
CS
.
When an ADE7756 register is addressed for a read operation,
the entire contents of that register are transferred to the serial
port. This allows the ADE7756 to modify its on-chip registers
without the risk of corrupting data during a multibyte transfer.
Note when a read operation follows a write operation, the read
command (i.e., write to communications register) should not
happen for at least 4
μ
s after the end of the write operation. If
the read command is sent within 4
μ
s of the write operation, the
last byte of the write operation may be lost. This is given as
timing specification t
9
.
t
5
t
4
CS
SCLK
DIN
A4
A3
A2
A1
A0
DB7
MOST SIGNIFICANT BYTE
1
DB0
DB7
DB0
LEAST SIGNIFICANT BYTE
0
0
COMMAND BYTE
t
1
t
2
t
3
t
6
t
7
t
8
Figure 38. Serial Interface Write Timing Diagram
SCLK
X
X
X
X
DB11 DB10
DB9
DB8
DIN
MOST SIGNIFICANT BYTE
DB3
DB2
DB1
DB0
DB7
DB6
DB5
DB4
LEAST SIGNIFICANT BYTE
Figure 39. 12-Bit Serial Write Operation
CS
SCLK
DIN
A4
A3
A2
A1
A0
0
0
0
t
1
t
10
DOUT
DB7
MOST SIGNIFICANT BYTE
LEAST SIGNIFICANT BYTE
COMMAND BYTE
DB0
DB7
DB0
t
13
t
12
t
9
t
11
t
11
Figure 40. Serial Interface Read Timing Diagram
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