參數(shù)資料
型號(hào): FM93C56LZMT8
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): DRAM
英文描述: (MICROWIRE⑩ Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read
中文描述: 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8
封裝: PLASTIC, TSSOP-8
文件頁(yè)數(shù): 10/16頁(yè)
文件大?。?/td> 171K
代理商: FM93C56LZMT8
10
www.fairchildsemi.com
FM93CS56 Rev. C.1
F
w
Timing Diagrams
(Continued)
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
WRITE DISABLE CYCLE (WDS)
Start
Bit
93CS56:
Address bits pattern -> 0-0-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Opcode
Bits(2)
1
0
0
A7
A6
A1
A0
PRE
t
CS
Address
Bits(8)
Data
Bits(16)
CS
PE
SK
DI
DO
High - Z
t
CS
WRITE CYCLE (WRITE)
Start
Bit
93CS56:
Address bits pattern -> x-A6-A5-A4-A3-A2-A1-A0; (x -> Don't Care, can be 0 or 1); ( A6-A0 -> User defined )
Data bits pattern -> User defined
Opcode
Bits(2)
1
0
1
A7
A6
A1
A0
D15
D14
D1
D0
PRE
Busy
Ready
t
WP
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
WRITE ENABLE CYCLE (WEN)
Start
Bit
93CS56:
Address bits pattern -> 1-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Opcode
Bits(2)
1
0
0
A7
A6
A1
A0
PRE
t
CS
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