參數(shù)資料
型號(hào): FM93CS56LVM8
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: (MICROWIRE⑩ Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read
中文描述: 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8
封裝: 0.150 INCH, PLASTIC, SO-8
文件頁數(shù): 11/16頁
文件大?。?/td> 171K
代理商: FM93CS56LVM8
11
www.fairchildsemi.com
FM93CS56 Rev. C.1
F
w
Timing Diagrams
(Continued)
CS
SK
DI
DO
High - Z
Dummy
Bit
1
1
0
A7
A6
A1
A0
PRE
PE
0
D7
D1
D0
t
CS
PROTECT REGISTER READ CYCLE (PRREAD)
Address
Bits(8)
Start
Bit
Opcode
Bits(2)
93CS56:
Address bits pattern -> x-x-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
PROTECT REGISTER ENABLE CYCLE (PREN)
Start
Bit
93CS56:
Address bits pattern -> 1-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Opcode
Bits(2)
1
0
0
A7
A6
A1
A0
PRE
t
CS
Address
Bits(8)
Data
Bits(16)
CS
PE
SK
DI
DO
93CS56:
Address bits pattern -> 0-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Data bits pattern -> User defined
High - Z
t
CS
WRITE ALL CYCLE (WRALL)
Start
Bit
Opcode
Bits(2)
1
0
0
A7
A6
A1
A0
D15
D14
D1
D0
PRE
Busy
Ready
t
WP
相關(guān)PDF資料
PDF描述
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