
KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
股
份
有
限
公
司
HE84G763B
HE80004 Series
June 1, 2004
This specification is subject to change without notice. Please contact sales person for the latest version before use.
44
V0.92
VDD
CPU
bias &
filter
circuit
VO(DAO)
SPEAKER
The
VOC
is a three bit voice control register in the 7-bit mode.
VOC
Field
Reset
PWM: ‘1’ PWM output enabled; ‘0’ PWM output disabled.
DAC: ‘1’ DAC enabled; ‘0’ DAC disabled.
OP: ‘1’ DAC uses DAO pin as output pin; ‘0’ DAC uses VO pin as output pin.
19.
Low Voltage Detection/Reset
address
0x13
-
Bit 7
-
-
Bit 6
-
-
Bit 5
-
-
Bit 4
-
-
Bit 3
-
-
Bit 2
PWM
0
Bit 1
DAC
0
Bit 0
OP
0
The low voltage detection is used to detect low battery or low power condition. There are 4 options on the
detection level selectable by mask option MO_DLVL. The low voltage detection circuit can be turned off
by clearing LVDE bit, and the status of supply power can be read out at bit LVDO of LVDC register
(extension register 0x17h).
MO_DLVL
00
01
10
11
Detection voltage
2.4 volts
2.6 volts
2.8 volts
3.0 volts
LVDC
Field
Mode
Reset
LVDO: ‘0’
Battery level low; ‘1’
Battery level high
LVDE: ‘0’
Disable voltage Detection; ‘1’
Enable voltage Detection
Bit 7
LVDO
R
-
Bit 6
-
-
-
Bit 5
-
-
-
Bit 4
-
-
-
Bit 3
-
-
-
Bit 2
-
-
-
Bit 1
-
-
-
Bit 0
LVDE
W
0
Low voltage reset circuit prevents the CPU from operating below its physical limit. When the supply
voltage drops below V
DET
(2.2Volt), the CPU will be held in reset state until the supply voltage rises to
V
RLS
. Then CPU will be released from reset state. V
RLS
will be higher than V
DET
by 5% to provide
hysteresis and prevent CPU from bouncing back and forth between reset and operating state. The low
voltage reset function can be enabled or disabled by mask option MO_LVRE.