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參數(shù)資料
| 型號(hào)： | HE84G770B |
| 廠商： | King Billion Electronics Co., Ltd. |
| 英文描述： | 8-BIT MICRO-CONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 31/61頁 |
| 文件大小： | 817K |
| 代理商： | HE84G770B |
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King Billion Electronics Co., Ltd
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HE84G770
HE80004H SERIES
October 31, 2003
This specification is subject to change without notice. Please contact sales person for the latest version before use.
31
Version:V1.1
Field
Value
0
1
0
1
0
1
0
1
0
Function
LCD power system enabled.
LCD power system disabled.
Internal Charge-pump doesn’t accelerate to charge the capacitor.
Internal Charge-pump accelerates to charge the capacitor.
Disable internal bias network buffer
Enable internal bias network buffer
Reset GRAY palette register pointer by write ‘0’ to CLR_P bit.
No effect on GRAY palette register pointer
normal display
LCD display blanked. The COM signals of LCD driver output inactive levels
(LVL4 and LVL1) while SEG signals output normal display patterns.
LCD driver disabled, LCD driver has no output signal and LVL1 ~ LVL5 is pulled
up to VDD
LCD driver master control enabled
POWDN
PAcc
BUFE
CLR_GP
BLANK
1
0
LCDE
1
Bias Setting:
Different duties require different bias settings. There is some theoretical correspondence
between the Duty and Bias Setting. However, it is better to use it as starting point and adjust it with real
LCD panel connected to it to determine the final setting. The theoretic relationship between the duty and
bias setting is as the following table: However, the actual bias setting should be determined based on the
best visual effect given when the target LCD panel is connected.
Duty Cycle
32 duty
48 duty
64 duty
80 duty
Normal Bias Setting
1/7
1/8
1/9
1/10
The bias setting is made by mask option MO_LBSR[1..0].
MO_LBSR[1..0]
00
01
10
11
Bias Setting
1/7
1/8
1/9
1/10
Please note that LCD driver must be turned off before the IC goes into sleep mode. That means user must
clear the bit 0 of LCDC to turn off LCD driving circuit before setting bit6 of OP1 to enter sleep mode.
Large current might happen if the procedure is not followed. Please note that LCD driver uses slow clock
as clock source. The LCD display will not display normally if it works in Fast clock only mode because
the LCD refresh action is too fast. The LCD power system shall be enabled by set POWDN to ‘1’ before
the LCD display is enabled. In order to accelerate the capacitor charging, the “PAcc” bit shall be set when
the LCD power system is initialized and then “PAcc” can be cleared when the LCD power system is
stable.
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