- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384401 > HEF4517BP (NXP Semiconductors N.V.) Dual 64-bit static shift register PDF資料下載
參數(shù)資料
| 型號(hào)： | HEF4517BP |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 64-bit static shift register |
| 封裝： | HEF4517BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4517BT<SOT162-1 (SO16)|<<http://www.nxp.com/packages/SOT162-1.html<1<Alway |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 159K |
| 代理商： | HEF4517BP |
HEF4517B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 11 November 2011
5 of 16
NXP Semiconductors
HEF4517B
Dual 64-bit static shift register
6. Functional description
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance state;
= positive-going transition;
= negative-going transition.
7. Limiting values
[1]
For DIP16 package: P
tot
derates linearly with 12 mW/K above 70
C.
For SO16 package: P
tot
derates linearly with 8 mW/K above 70
C.
[2]
Table 3.
Inputs
nCP nD
Function table
[1]
Inputs/outputs
nQ16
content of
16th bit
displayed
data at nQ16
entered into
17th bit
no change
Z
Mode
nPE/OE
L
nQ32
content of
32nd bit
displayed
data at nQ32
entered into
33rd bit
no change
Z
nQ48
content of
48th bit
displayed
data at nQ48
entered into
49th bit
no change
Z
nQ64
content of
64th bit
displayed
remains in ‘Z’
state
data entered
into 1st bit
One 64-bit shift register. The
content of the shift register is
shifted over one stage
Four 16-bit shift register. The
content of the shift registers is
shifted over one stage
no change
no change
data entered
into 1st bit
H
X
X
L
H
no change
Z
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
V
DD
supply voltage
I
IK
input clamping current
V
I
input voltage
I
OK
output clamping current
I
I/O
input/output current
I
DD
supply current
T
stg
storage temperature
T
amb
ambient temperature
P
tot
total power dissipation
Limiting values
Conditions
Min
0.5
-
0.5
-
-
-
65
40
Max
+18
10
V
DD
+ 0.5
10
10
50
+150
+85
750
500
100
Unit
V
mA
V
mA
mA
mA
C
C
mW
mW
mW
V
I
<
0.5 V or V
I
> V
DD
+ 0.5 V
V
O
<
0.5 V or V
O
> V
DD
+ 0.5 V
DIP16 package
SO16 package
per output
[1]
-
[2]
-
P
power dissipation
-
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HEF4517BT | Dual 64-bit static shift register |
| HEF4518BP | Dual BCD counter |
| HEF4518BT | Dual BCD counter |
| HEF4520BP | Dual binary counter |
| HEF4520BT | Dual binary counter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HEF4517BP,652 | 功能描述:計(jì)數(shù)器移位寄存器 DUAL 64-BIT STATIC RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| HEF4517BP652 | 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| HEF4517BPN | 功能描述:計(jì)數(shù)器移位寄存器 DUAL 64-BIT STATIC SHIFT REG RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| HEF4517BT,512 | 功能描述:計(jì)數(shù)器移位寄存器 DUAL 64-BIT STATIC RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| HEF4517BT,518 | 功能描述:計(jì)數(shù)器移位寄存器 DUAL 64-BIT STATIC RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。