參數(shù)資料
型號(hào)： HEF4894BTT
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： 12-stage shift-and-store register LED driver
封裝： HEF4894BP<SOT146-1 (DIP20)|<<http://www.nxp.com/packages/SOT146-1.html<1<Always Pb-free,;HEF4894BT<SOT163-1 (SO20)|<<http://www.nxp.com/packages/SOT163-1.html<1<wee
文件頁(yè)數(shù)： 8/19頁(yè)
文件大?。?/td> 506K
代理商： HEF4894BTT
HEF4894B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 7 — 13 August 2010
8 of 19
NXP Semiconductors
HEF4894B
12-stage shift-and-store register LED driver
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
t
en
is the same as t
PZL
and t
dis
is the same as t
PLZ
.
t
t
is the same as t
TLH
and t
THL
.
[2]
[3]
Table 8.
P
D
can be calculated from the formulas shown. V
SS
= 0 V; t
r
= t
f
≤
20 ns; T
amb
= 25
°
C.
Symbol Parameter
V
DD
P
D
dynamic power
dissipation
10 V
15 V
t
en
OE to QPn;
see
Figure 8
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
[2]
-
100
55
50
80
40
30
85
40
30
30
15
12
40
30
12
30
10
200
110
100
160
80
60
170
80
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
-
-
-
-
-
-
-
-
t
dis
OE to QPn;
see
Figure 8
[2]
t
t
transition time
QS1, QS2;
see
Figure 6
[1][3]
35 ns + (1.00 ns/pF)C
L
19 ns + (0.42 ns/pF)C
L
16 ns + (0.28 ns/pF)C
L
t
W
pulse width
CP; LOW and HIGH;
see
Figure 6
60
30
24
80
60
24
60
20
15
+5
20
20
5
11
14
-
-
-
-
-
-
-
-
-
-
-
-
STR; HIGH;
see
Figure 7
t
su
set-up time
D to CP;
see
Figure 9
5
t
h
hold time
D to CP;
see
Figure 9
15
5
5
f
clk(max)
maximum clock
frequency
CP; see
Figure 6
10
22
28
-
-
-
Table 7.
V
SS
= 0 V; T
amb
= 25
°
C unless otherwise specified. For test circuit see
Figure 10
.
Symbol Parameter
Conditions
Dynamic characteristics
…continued
V
DD
Extrapolation formula
Min
Typ
Max
Unit
Dynamic power dissipation
Typical formula
P
D
= 1200
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
μ
W
P
D
= 5550
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
μ
W
P
D
= 15000
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
μ
W
Where
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
Σ
(f
o
×
C
L
) = sum of the outputs;
V
DD
= supply voltage in V.
5 V
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