參數(shù)資料
型號： HFA3861IV96
廠商： INTERSIL CORP
元件分類： 無繩電話/電話
英文描述： Direct Sequence Spread Spectrum Baseband Processor
中文描述： TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP64
封裝： 10 X 10 MM, PLASTIC, TQFP-64
文件頁數(shù)： 29/35頁
文件大小： 218K
代理商： HFA3861IV96
29
CONFIGURATION REGISTER ADDRESS 33 (42h) R/W TE4ST MODES 2
Bits 7:4
Unused, set to 0
Bit 3
disable time adjust
0 = normal
1 = disabled
Bit 2
Internal digital loop back mode (SDI pin becomes LOCK input to acquisition block)
0 = normal chip operation loop back disabled
1 = loop back enabled, A/D and D/A converters bypassed, chip will not respond to external signals
Bit 1
enable PN to lower test bus address (2-0)
0 = normal
1 = PN to test bus address
Bit 0
enable PN to upper test bus address (7-3)
0 = normal
1 = PN to test bus address
CONFIGURATION REGISTER ADDRESS 34 (44h) R/W TEST BUS ADDRESS
Bits 7:0
address bits for various tests. See Tech Brief #TBD for a description of the factory test modes
CONFIGURATION REGISTER ADDRESS 35 (46h) R/W CMF COEFFICIENT CONTROL THRESHOLD
Bit 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6:0
00h will force use of calculated weights
07h will force use of defaults
CONFIGURATION REGISTER ADDRESS 36 (48h) R/W SCRAMBLER SEED LONG PREAMBLE
Bit 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6:0
scrambler seed for long preamble
bit 3 of CR5 selects CR36 or CR 37
CONFIGURATION REGISTER ADDRESS 37 (4Ch) R/W SCRAMBLER SEED SHORT PREAMBLE
Bit 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6:0
scrambler seed for short preamble
bit 3 of CR5 selects CR36 or CR 37
CONFIGURATION REGISTER ADDRESS 38 (4Eh) R/W ED THRESHOLD
Bit 7:0
Energy detect threshold
CONFIGURATION REGISTER ADDRESS 39 (50h) R/W CMF GAIN THRESHOLD
Bit 7:0
Channel Matched filter gain threshold
CONFIGURATION REGISTER ADDRESS 48 (60h) R/W SQ1 SCALE FACTOR
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
SQ1 scale factor (0-4 range) (000000 - 100000)
CONFIGURATION REGISTER ADDRESS 50 (66h) R TEST BUS READ
Bit 7:0
reads value on test bus
CONFIGURATION REGISTER ADDRESS 51 (68h) R SIGNAL QUALITY MEASURE
Bit 7:0
measures signal quality based on the SNR in the carrier tracking loop
CONFIGURATION REGISTER ADDRESS 52 (6Ah) R RECEIVED SIGNAL FIELD
Bit 7:0
8-bit value of received signal field
HFA3861
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