參數(shù)資料
型號(hào): HI-3183PJT
廠商: HOLT INTEGRATED CIRCUITS INC
元件分類: 通用總線功能
英文描述: ARINC 429 DIFFERENTIAL LINE DRIVER
中文描述: LINE DRIVER, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 2/10頁(yè)
文件大?。?/td> 428K
代理商: HI-3183PJT
FUNCTIONAL DESCRIPTION
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input. Each logic
input, including the power enable (
TTL/CMOScompatible.
) input, are
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-3182;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing.
differentialoutputvoltageswingwillequal2V
V
otherthan +5V isneeded, a separate +5V power supply
isrequiredforpinV .
1
The
. Ifavalueof
Withthe DATA(A)inputatalogichighandDATA(B)inputata
logic low, A
will switch to the +V
switch to the -V
rail (ARINC HIGH state). With both data
inputsignalsatalogiclowstate,theoutputswillbothswitchto
0V(ARINCNULLstate).
rail and B
will
The driver output impedance, R
ohmsdependingontheoptionchosen. Theriseandfalltimes
of the outputs can be calibrated through the selection of two
externalcapacitorvaluesth
input pins. Typical values for high-speed operation
(100KBPS) are C = C = 75pF and for low-speed operation
(12.5to14KBPS)C =C =500pF.
A
, is nominally 75, 26 or 0
reconnectedtotheC andC
STROBE
REF
REF
OUT
REF
OUT
REF
OUT
A
B
A
ata
The C and C pins swing between +5V and ground allowing
the switching of capacitor values with an external single-
supplyanalogswitch.
A
B
The ARINC outputs can be put in a tri-state mode by applying
a logic high to the
input pin. If this feature is not
being used, the pin should be tied to ground. The
function is not available in the 14 & 16-pin SOIC package
configurations where the pin is internally connected to
ground.
The ARINC outputs of the HI-3182, HI-3184 and HI-3187 are
protected by internal fuses capable of sinking between 800 -
900mAforshortperiodsoftime(125 s).
STROBE
STROBE
DATA (A)
OUT
DATA (B)
INPUTS
TO ARINC BUS
B
REF
V
1
V
SYNC
CLOCK
-V
+V
STROBE
GND
C
C
-15V
+15V
+5V
Figure 1.
ARINC 429 BUS APPLICATION
HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3187, HI-3188
Figure 2.
FUNCTIONAL BLOCK DIAGRAM
OUT
B
Shorted on
HI-3186, HI-3187, HI-3188
C
L
REF
F
A
R
L
F
B
OUTPUT
DRIVER (B)
OUTPUT
DRIVER (A)
B
C
GND
-V
DATA (A)
DATA (B)
SYNC
CLOCK
V
1
STROBE
A
C
+V
LEVEL SHIFTER
AND SLOPE
CONTROL (B)
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
CURRENT
REGULATOR
13
24.5
13
24.5
Shorted on
HI-3183, HI-3186
HI-3187, HI-3188
Shorted on
HI-3183, HI-3185
HI-3186, HI-3188
HOLT INTEGRATED CIRCUITS
2
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