參數(shù)資料
型號: HI-3584PQTF
廠商: HOLT INTEGRATED CIRCUITS INC
元件分類: 微控制器/微處理器
英文描述: Enhanced ARINC 429 3.3V Serial Transmitter and Dual Receiver
中文描述: 1 CHANNEL(S), 125K bps, SERIAL COMM CONTROLLER, PQFP52
封裝: ROHS COMPLIANT, PLASTIC, QFP-52
文件頁數(shù): 1/15頁
文件大?。?/td> 327K
代理商: HI-3584PQTF
HI-3584
Enhanced ARINC 429
3.3V Serial Transmitter and Dual Receiver
PIN CONFIGURATIONS
(Top View)
(See page 13 for additional pin configuration)
GENERALDESCRIPTION
The HI-3584 from Holt Integrated Circuits is a silicon gate
CMOSdeviceforinterfacinga16-bitparalleldatabustothe
ARINC 429 serial bus. The HI-3584 design offers many
enhancements to the industry standard HI-8282
architecture. The device provides two receivers each with
label recognition, a 32 by 32 FIFO, and an analog line
receiver. Up to 16 labels may be programmed for each
receiver. The independent transmitter also has a 32 by 32
FIFO ThestatusofallthreeFIFOscanbemonitoredusing
the external status pins or by polling the HI-3584’s status
register.
Other new features include a programmable option of data
orparityinthe32ndbit,andtheabilitytounscramblethe32
bit word. Also, versions are available with different values
of input resistance to allow users to more easily add
external lightningprotectioncircuitry.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers. The databus and all control
signalsareCMOSandTTLcompatible.
The HI-3584 applies the ARINC protocol to the receivers
andtransmitter. Timingisbasedona1Megahertzclock.
.
Additional interface circuitry such as the Holt HI-8585 or
HI-8586 is required to translate the transmitter’s 3.3 volt
logic outputs toARINC 429 drive levels.
APPLICATIONS
Avionics data communication
Serial to parallel conversion
Parallel to serial conversion
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS3584 Rev. E)
/06
09
September 2006
FEATURES
ARINC specification 429 compatible
Dual receiver and transmitter interface
Analog line receivers connect directly to ARINC bus
Programmable label recognition
On-chip 16 label memory for each receiver
32 x 32 FIFOs each receiver and transmitter
Independent data rate selection for transmitter
and each receiver
Status register
Data scramble control
32nd transmit bit can be data or parity
Self test mode
Low power
Industrial & full military temperature ranges
3.3V logic supply operation
HI-3584PQI
&
HI-3584PQT
5
5
5
4
4
4
4
4
4
4
4
4
4
D
M
R
39 - N/C
38 -
37 - ENTX
36 - N/C
35 -
34 - 429DO
33 - N/C
32 -
31 -
30 - TX/R
29 -
28 -
27 - BD00
CWSTR
FFT
HFT
PL2
PL1
429DO
B
B
B
B
B
N
-
G
N
B
B
B
B
B
FF1
HF1
D/R2
FF2
HF2
SEL - 6
EN1
EN2
BD15 - 9
BD14 - 10
BD13 - 11
BD12 - 12
BD11 - 13
- 1
- 2
- 3
- 4
- 5
- 7
- 8
52 - Pin Plastic Quad Flat Pack (PQFP)
6
6
6
6
6
5
5
5
5
5
5
5
5
M
R
5
5
-
4
48
47
46 -
45 - N/C
44 - N/C
43 - N/C
42 - N/C
41
40 -
39 -
38 - TX/R
37 -
36 -
35 -
34 - BD01
33 - N/C
-
- ENTX
429DO
- 429DO
FFT
HFT
BD00
CWSTR
PL2
PL1
N
B
B
B
B
-
B
-
G
N
-
N
-
N
-
N
B
B
B
B
N
N/C - 1
D/R1
FF1
HF1
- 2
- 3
- 4
- 5
- 6
- 7
SEL - 8
EN1
EN2
- 9
- 10
N/C - 11
BD15 - 12
BD14 - 13
BD13 - 14
BD12 - 15
BD11 - 16
D/R2
FF2
HF2
(Note: All 3 VDD pins
be connected to the same 3.3V supply)
must
64 - Pin Plastic 9mm x 9mm
Chip-Scale Package
HI-3584PCI
&
HI-3584PCT
See Note below
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