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參數(shù)資料
| 型號(hào)： | HI-8581CJT |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| 中文描述： | 1 CHANNEL(S), 125K bps, SERIAL COMM CONTROLLER, CQCC44 |
| 封裝： | CERQUAD-44 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 480K |
| 代理商： | HI-8581CJT |
HI-8581
PIN CONFIGURATION
(Top View)
GENERALDESCRIPTION
TheHI-8581devicefromHoltIntegratedCircuitsisasilicon
gate CMOS device for interfacing a 16-bit parallel data bus
directly to the ARINC 429 serial bus. The device provides
two receivers, an independent transmitter and line driver
capability in a single package. The receiver input circuitry
and logic are designed to meet the ARINC 429
specifications for loading, level detection, timing, and
protocol. The transmitter section provides the ARINC 429
communicationprotocolandthe linedrivercircuits provide
theARINC429 outputlevels.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
orinterrogating the receivers. The data bus interfaceswith
CMOSandTTL.
Timing of allthe circuitrybeginswith the masterclockinput,
CLK.
For ARINC 429 applications, the master clock
frequencyis1MHz.
Each independent receiver monitorsthe data stream with a
sampling rate 10 times the data rate. The sampling rate is
software selectableateither1MHz or125KHz. The results
of a parity check are available as the 32nd ARINC bit. The
HI-8581 examines the null and data timings and will reject
erroneous patterns. For example, with a 125 KHz clock
selection, the data frequency must be between 10.4 KHz
and15.6KHz.
The transmitter has a First In, First Out (FIFO) memory to
store8ARINCwordsfortransmission. Thedatarateofthe
transmitter is software selectable by dividing the master
clock, CLK, by either 10 or 80. The master clock is used to
setthetimingoftheARINCtransmissionwithintherequired
resolution.
APPLICATIONS
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Avionics data communication
Serial to parallel conversion
Parallel to serial conversion
FEATURES
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ARINC specification 429 compatible
Direct receiver and transmitter interface to
ARINC bus in a single device.
16-Bit parallel data bus.
Timing control 10 times the data rate
Selectable data clocks
Receiver error rejection per ARINC
specification 429
Automatic transmitter data timing
Self test mode
Parity functions
Low power
Industrial & full military temperature ranges
June 2001
33 -
32 - N/C
31 - V+
30 - TXB(OUT)
29 - TXA(OUT)
28 - V-
27 - GND
26 - TX/R
25 -
24 -
23 -
BD00
ENTX
PL2
PL1
429DI2(B) - 1
D/R1
D/R2
- 2
- 3
SEL - 4
EN1
EN2
- 5
- 6
BD15 - 7
BD14 - 8
BD13 - 9
BD12 - 10
BD11 - 11
HI-8581PQI
&
HI-8581PQT
HOLT INTEGRATED CIRCUITS
1
(DS8581 Rev. A)
06/01
(See page 13 for additional pin configurations)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8581PJT | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PQI | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PQT | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581 | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PJI | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI-8581CJT-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581CJTF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581CJTF-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PJI | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PJI-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
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