參數(shù)資料
型號: HI5813
廠商: Intersil Corporation
英文描述: CMOS 25Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold(CMOS 12位片內(nèi)帶跟蹤和保持電路的ADC)
中文描述: 的CMOS 25Microsecond,12位,采樣的A / D轉(zhuǎn)換器內(nèi)部跟蹤和保持的CMOS(12位片內(nèi)帶跟蹤和保持電路的ADC)的
文件頁數(shù): 3/11頁
文件大?。?/td> 153K
代理商: HI5813
6-1804
Absolute Maximum Ratings
Thermal Information
Supply Voltage
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . .(V
SS
-0.5V) < V
DD
< +6.5V
V
AA
+ to V
AA
-. . . . . . . . . . . . . . . . . . . .(V
SS
-0.5V) to (V
SS
+6.5V)
V
AA
+ to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
0.3V
Analog and Reference Inputs
V
IN
, V
REF
+, V
REF
-. . . . . . . . . (V
SS
-0.3V) < V
INA
< (V
DD
+0.3V)
Digital I/O Pins . . . . . . . . . . . . . . (V
SS
-0.3V) < VI/O < (V
DD
+0.3V)
Operating Conditions
Temperature Range
PDIP, SOIC, and CERDIP Packages . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
PDIP Package . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . .
CERDIP Package . . . . . . . . . . . . . . . .
Maximum Junction Temperature
PDIP and SOIC Packages. . . . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
ο
C to 150
o
C
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
80
75
60
θ
JC
(
o
C/W)
N/A
N/A
12
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
DD
= V
AA
+ = V
REF
+ = 3.3V, V
SS
= V
AA
- = V
REF
- = GND, CLK = 600kHz (J suffix),
CLK = 500kHz (K suffix), Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
25
o
C
-
40
o
C TO 85
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
ACCURACY
Resolution
12
-
-
12
-
Bits
Integral Linearity Error, INL
(End Point)
J
-
-
±
4.0
-
±
4.0
LSB
K
-
-
±
2.5
-
±
2.5
LSB
Differential Linearity Error, DNL
J
-
-
±
4.0
-
±
4.0
LSB
K
-
-
±
2.0
-
±
2.0
LSB
Gain Error, FSE
(Adjustable to Zero)
J
-
-
±
2.0
-
±
2.0
LSB
K
-
-
±
2.0
-
±
2.0
LSB
Offset Error, V
OS
(Adjustable to Zero)
J
-
-
±
3.0
-
±
3.0
LSB
K
-
-
±
2.5
-
±
2.5
LSB
DYNAMIC CHARACTERISTICS
Signal to Noise Ratio, SINAD
RMS Signal
RMS Noise + Distortion
J
f
S
= 600kHz, f
IN
= 1kHz
-
61.5
-
-
-
dB
K
f
S
= 500kHz, f
IN
= 1kHz
-
63.9
-
-
-
dB
Signal to Noise Ratio, SNR
RMS Signal
RMS Noise
J
f
S
= 600kHz, f
IN
= 1kHz
-
63.2
-
-
-
dB
K
f
S
= 500kHz, f
IN
= 1kHz
-
65.1
-
-
-
dB
Total Harmonic Distortion, THD
J
f
S
= 750kHz, f
IN
= 1kHz
-
-68.4
-
-
-
dBc
K
f
S
= 750kHz, f
IN
= 1kHz
-
-70.8
-
-
-
dBc
Spurious Free Dynamic Range,
SFDR
J
f
S
= 600kHz, f
IN
= 1kHz
-
69.0
-
-
-
dB
K
f
S
= 500kHz, f
IN
= 1kHz
-
71.8
-
-
-
dB
ANALOG INPUT
Input Current, Dynamic
At V
IN
= V
REF
+, 0V
-
±
50
±
100
-
±
100
μ
A
Input Current, Static
Conversion Stopped
-
±
0.4
±
10
-
±
10
μ
A
HI5813
相關PDF資料
PDF描述
HI5813JIB CMOS 3.3V, 25 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
HI5813JIJ CMOS 3.3V, 25 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
HI5813JIP CMOS 3.3V, 25 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
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HI5813KIJ CMOS 3.3V, 25 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
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