參數(shù)資料
型號(hào): HV574
廠商: ELAN Microelctronics Corp .
英文描述: 100 MHz, 80-Channel Serial To Parallel Converter With Push-Pull Outputs(100 MHz,最大輸出電壓80V,帶推挽輸出的80通道低壓串行到高壓并行轉(zhuǎn)換器)
中文描述: 100兆赫,80通道串行并行轉(zhuǎn)換器與推式輸出(100 MHz的最大輸出電壓80V的,帶推挽輸出的80通道低壓串行到高壓并行轉(zhuǎn)換器)
文件頁(yè)數(shù): 2/5頁(yè)
文件大小: 35K
代理商: HV574
12-87
12
HV574
Electrical Characteristics
(over recommended commercial operating conditions unless noted)
DC Characteristics
Symbol
I
DD
Parameter
Min
Max
30
Units
mA
Conditions
V
DD
supply current
V
DD
= V
DD
max
f
CLK
= 25MHz
I
PP
High voltage supply current
100
μ
A
μ
A
μ
A
Outputs high
100
Outputs low
I
DDQ
V
OH
Quiescent V
DD
supply current
High-level output
100
All V
IN
= V
DD
I
O
= -30mA, V
PP
= 80V
I
O
= -100
μ
A
I
O
= 15mA, V
DD
= 5V
I
O
= 100
μ
A
V
IH
= V
DD
V
IL
= 0V
HV
OUT
Data out
V
PP
- 9V
V
DD
- 0.5
V
V
V
OL
Low-level output
HV
OUT
Data out
3.75
V
0.5
V
I
IH
I
IL
High-level logic input current
1
μ
A
μ
A
Low-level logic input current
-1
AC Characteristics
(T
A
= 85
°
C max. Logic signal inputs and Data inputs have t
r
, t
f
5ns [10% and 90% points])
Symbol
Parameter
Min
Max
Units
Conditions
f
CLK
Clock frequency
0.1
25
MHz
Per Register, V
DD
5.0V
Per Register, V
DD
4.5V
22.5
t
WL
,t
WH
t
SU
t
H
t
ON
, t
OFF
t
DHL
t
DLH
t
DLE
*
t
WLE
t
SLE
tr, tf
Clock width high or low
20
ns
Data set-up time before clock rises
5
ns
Data hold time after clock rises
15
ns
Time from latch enable to HV
OUT
Delay time clock to data high to low
500
ns
C
L
= 15pF
C
L
= 15pF, V
DD
= 5.0V
C
L
= 15pF, V
DD
= 5.0V
125
ns
Delay time clock to data low to high
125
ns
Delay time clock to LE low to high
25
ns
Width of LE pulse
25
ns
LE set-up time before clock rises
0
ns
Output rise/fall time
1.0
μ
s
C
L
= 600pF,
HV
OUT
from 0 to 60V
*
t
DLE
is not required but is recommended to produce stable HV outputs and thus minimize power dissipation and current spikes (allows internal SR output to stabilize).
Symbol
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
Parameter
Min
4.5
Max
5.5
Units
V
Logic supply voltage
Output voltage
12
80
V
High-level input voltage
V
DD
-0.5V
0
V
Low-level input voltage
0.5
V
Clock frequency per register
0.1
25
MHz
Operating free-air temperature
-40
+85
°
C
Notes:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
PP
.
Power-down sequence should be the reverse of the above.
The V
PP
should not drop below V
DD
during operation.
Recommended Operating Conditions
相關(guān)PDF資料
PDF描述
HV574 100 MHz, 80-Channel Serial To Parallel Converter With Push-Pull Outputs
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