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參數(shù)資料
| 型號： | I74F786D |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 標(biāo)準(zhǔn)邏輯 |
| 英文描述： | 4-bit asynchronous bus arbiter |
| 封裝： | I74F786D<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week 6, 2004,;I74F786D<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week 6, |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 105K |
| 代理商： | I74F786D |
Philips Semiconductors
Product specification
74F786
4-bit asynchronous bus arbiter
February 14, 1991
3
FUNCTIONAL DESCRIPTION
The BRn inputs have no inherent priority. The arbiter assigns priority
to the incoming requests as they are received, therefore, the first BR
asserted will have the highest priority. When a bus request is
received its corresponding bus grant becomes active, provided that
EN is low. If additional bus requests are made during this time they
are queued. When the first request is removed, the arbiter services
the bus request with the next highest priority. Removing a request
while a previous request is being serviced can cause a grant to be
changed when arbitrating between three or four requests. For that
reason, the user should not remove ungranted requests when
arbitrating between three or four requests. This does not apply to
arbitration between two requests
.
If two or more BRn inputs are asserted at precisely the same time,
one of them will be selected at random, and all BGn outputs will be
held in the high state until the selection is made. This guarantees
that an erroneous BGn will not be generated even though a
metastable condition may occur internal to the device. When the EN
is in the high state the BGn outputs are forced high.
PIN CONFIGURATION
16
15
14
13
12
11
10
7
6
5
4
3
2
1
9
8
V
CC
B
C
D
BR0
BR1
BR2
BR3
GND
A
YOUT
BG0
BG1
BG2
BG3
EN
SF00441
PIN DESCRIPTION
SYMBOL
PINS
TYPE
NAME
FUNCTION
BR0 – BR3
4, 5, 6, 7
Input
Bus request inputs (active low)
The logic of this device arbitrates between these four inputs.
Unused inputs should be tied high.
A, B, C, D
15, 1, 2, 3
Input
Inputs of the 4–input AND gate
EN
9
Input
Enable input
When low it enables the BG0 – BG3 outputs.
BG0 – BG3
13, 12, 11, 10
Output
Bus grant outputs (active low)
These outputs indicate the selected bus request. BG0 corre-
sponds to BR0, BG1 to BR1, etc.
YOUT
14
Output
Output of the 4–input AND gate
GND
8
Ground
ground (0V)
V
CC
16
Power
Positive supply voltages
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| N74F786D | 4-bit asynchronous bus arbiter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| I74F786D,602 | 功能描述:特定功能邏輯 I74F786D/SO16/TUBE-BULK// RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| I74F786D,623 | 功能描述:特定功能邏輯 I74F786D/SO16/REEL13// RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| I74F786DB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:80x86 Bus Arbiter |
| I74F786D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:80x86 Bus Arbiter |
| I74F786N | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:4-bit asynchronous bus arbiter |
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