參數(shù)資料
型號(hào)： IBM11M8735CB
廠商： IBM Microeletronics
英文描述： 8M x 72 DRAM Module(8M x 72 動(dòng)態(tài)RAM模塊)
中文描述： 8米× 72內(nèi)存（8米× 72動(dòng)態(tài)內(nèi)存模塊）
文件頁數(shù)： 9/29頁
文件大?。?/td> 597K
代理商： IBM11M8735CB
IBM11M8735C
IBM11M8735CB
8M x 72 DRAM MODULE
50H8010
SA14-4635-04
Revised 12/96
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 9 of 28
Read Cycle
Symbol
Parameter
-50
-60
-70
Unit
Notes
Min
Max
Min
Max
Min
Max
t
RAC
Access Time from RAS
—
50
—
60
—
70
ns
1, 2
t
CAC
Access Time from CAS
—
18
—
20
—
25
ns
1, 2
t
AA
Access Time from Address
—
30
—
35
—
40
ns
1, 2
t
OEA
Access Time from OE
—
18
—
20
—
25
ns
1, 2
t
RCS
Read Command Setup Time
2
—
2
—
2
—
ns
t
RCH
Read Command Hold Time to CAS
2
—
2
—
2
—
ns
3
t
RRH
Read Command Hold Time to RAS
0
—
0
—
0
—
ns
3
t
RAL
Column Address to RAS Lead Time
30
—
35
—
40
—
ns
t
CLZ
CAS to Output in Low-Z
2
—
2
—
2
—
ns
t
OES
OE setup time prior to CAS
7
—
10
—
10
—
ns
t
ORD
OE setup time prior to RAS (Hidden Refresh)
2
—
5
—
5
—
ns
t
CDD
CAS to D
IN
Delay Time
18
—
20
—
20
—
ns
5
t
OEZ
Output Buffer Turn-off Delay from OE
2
18
2
20
2
20
ns
4
t
OFF
Output Buffer Turn-off Delay
2
18
2
20
2
20
ns
4, 6
1. Measured with the specified current load and 100pF.
2. Access time is determined by the latter of t
RAC
, t
CAC
, t
CPA
, t
AA,
t
OEA
.
3. Either t
RCH
or t
RRH
must be satisfied.
4. t
OFF
(max) and t
OEZ
(max) define the time at which the output achieves the open circuit condition and is not referenced to output
voltage levels.
5. Either t
CDD
or t
ODD
must be satisfied.
6. t
OFF
is referenced from the rising edge of RAS or CAS , whichever is last.
Discontinued (9/98 - last order; 3/99 - last ship)
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