參數(shù)資料
型號： IBM11M8735H
廠商： IBM Microeletronics
英文描述： 8M x 72 DRAM Module(8M x 72 動態(tài)RAM模塊)
中文描述： 8米× 72內(nèi)存（8米× 72動態(tài)內(nèi)存模塊）
文件頁數(shù)： 6/29頁
文件大?。?/td> 516K
代理商： IBM11M8735H
IBM11M8735H
8M x 72 DRAM Module
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 6 of 29
50H8037.E22441D
Revised 4/98
AC Characteristics
(T
A
= 0 to +70
°
C, V
CC
= 3.3V
±
0.3V)
1. V
IH
(min) and V
IL
(max) are reference levels for measuring timing of input signals. Transition times are measured between V
IH
and
V
IL
.
2. An initial pause of 200
μ
s is required after power-up followed by 8 RAS only refresh cycles before proper device operation is
achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh
cycles is required.
3. The specified timings include buffer, loading, and skew delay adders: 2ns minimum, 5ns maximum delay, no pulse shrinkage to the
DRAM device timings. The data and RAS signals are not buffered, which preserves the DRAMs access specification of 50ns and
60ns.
4. AC measurements assume t
T
= 2ns.
DC Electrical Characteristics
(T
A
= 0 to +70
°
C, V
CC
= 3.3V 0.3V)
Symbol
Parameter
Min
Max
Units
Notes
I
CC1
Operating Current
Average Power Supply Operating Current
(RAS, CAS, Address Cycling: t
RC
= t
RC
min)
-50
—
1305
mA
1, 2, 3
-60
1170
I
CC2
Standby Current (TTL)
Power Supply Standby Current
(RAS = CAS
≥
V
IH
)
—
18
mA
I
CC3
RAS Only Refresh Current
Average Power Supply Current, RAS Only Mode
(RAS Cycling, CAS
≥
V
IH
: t
RC
= t
RC
min)
-50
—
1275
mA
1, 3
-60
990
I
CC4
EDO Page Mode Current
Average Power Supply Current, EDO Page Mode
(RAS
≤
V
IL
, CAS, Address Cycling: t
HPC
= t
HPC
min)
-50
—
765
mA
1, 2, 3
-60
720
I
CC5
Standby Current (CMOS)
Power Supply Standby Current
(RAS = CAS = V
CC
- 0.2V)
—
9
mA
I
CC6
CAS before RAS Refresh Current
Average Power Supply Current, CAS Before RAS Mode
(RAS, CAS, Cycling: t
RC
= t
RC
min)
-50
—
1080
mA
1, 3
-60
1080
I
I(L)
Input Leakage Current
Input Leakage Current, any Input
(0.0
≤
V
IN
≤
(V
CC
< 6.0V)), All Other Pins Not Under Test = 0V
All but RAS
-10
+10
μ
A
RAS
-50
+50
I
O(L)
Output Leakage Current
(D
OUT
is disabled, 0.0
≤
V
OUT
≤
V
CC
)
-2
+2
μ
A
V
OH
Output High Level
Output “H” Level Voltage (I
OUT
= -2mA @ 2.4V)
2.4
—
V
V
OL
Output Low level
Output “L” Level Voltage (I
OUT
= +2mA @ 0.4V)
—
0.4
V
1. I
CC1
, I
CC3
, I
CC4
, and I
CC6
depend on cycle rate.
2. I
CC1
and I
CC4
depend on output loading. Specified values are obtained with output open.
3. Address can be changed once or less while RAS = V
IL
. In the case of I
CC4
, it can be changed once or less when CAS = V
IH.
Discontinued (9/98 - last order; 3/99 - last ship)
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