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IBM11N1645L
IBM11N1735Q
1M x 64/72 DRAM Module
50H8035
SA14-4630-05
Revised 3/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 31
Features
168 Pin JEDEC Standard, Unbuffered 8 Byte
Dual In-line Memory Module
1Mx64, 1Mx72 Extended Data Out Page Mode
DIMM
S
Performance:
All inputs and outputs are LVTTL (3.3V) com-
patible
Single 3.3V
±
0.3V Power Supply
Au contacts
Optimized for byte-write, non-parity, or ECC
applications.
System Performance Benefits:
-Non buffered for increased performance
-Reduced noise (35 V
SS
/V
CC
pins)
-Byte write, byte read accesses
-Serial PDs
Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
Refresh Modes: RAS-Only, CBR and Hidden
Refresh
1024 refresh cycles distributed across 16ms
10/10 addressing (Row/Column)
Card Sizes: 5.25” x 1.0” x 0.202” (SOJ)
DRAMS in SOJ Packages
Description
IBM11N1645L/IBM11N1735Q industry standard
168-pin 8-byte Dual In-line Memory Modules
(DIMMs) which are organized as 1Mx64 and 1Mx72
high speed memory arrays designed with EDO
DRAMs for non-parity or ECC applications. The x64
DIMM uses 4 1Mx16 EDO DRAMs and the x72
DIMM uses 4 1Mx16 plus 2 1Mx4 EDO DRAMs (all
in SOJ packages). The use of EDO DRAMs allows
for a reduction in Page Mode Cycle time from 40ns
(Fast Page) to 25ns for 60ns and 6Rns DRAM mod-
ules.
The DIMMs use serial presence detects imple-
mented via a serial EEPROM using the two pin I
2
C
protocol. This communication protocol uses Clock
(SCL) and Data I/O (SDA) lines to synchronously
clock data between the master (system logic) and
the slave EEPROM device (DIMM). The EEPROM
device address pins (SA0-2) are brought out to the
DIMM tabs to allow 8 unique DIMM/EEPROM
addresses. The first 128 bytes are utilized by the
DIMM manufacturer and the second 128 bytes of
serial PD data are available to the customer.
All IBM 168-pin DIMMs provide a high performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products include the unbuffered
X72 ECC DIMMs and the buffered DIMMs (x64, x72
parity and x72 ECC Optmized) for applications
which can benefit from the on-card buffers.
-60
60ns
15ns
30ns
104ns 104ns
25ns
-6R
60ns
17ns
30ns
t
RAC
t
CAC
t
AA
t
RC
t
HPC
RAS Access Time
CAS Access Time
Access Time From Address
Cycle Time
EDO Mode Cycle Time
25ns
Card Outline (TSOP version shown)
1
85
10
94
11
95
40
124
41
125
84
168
(Front)
(Back)
IBM11N1645L1M x 64 E10/10, 3.3V, Au, EDOMMDL24DSU-001020631. IBM11N1735Q1M x 72 E10/10, 3.3V, Au, EDOMMDL24DSU-001020631.
Discontinued (9/98 - last order; 3/99 last ship)