- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379204 > IBM11N1645L (IBM Microeletronics) 1M x 64 DRAM Module(1M x 64 動態(tài)RAM模塊) PDF資料下載
參數(shù)資料
| 型號： | IBM11N1645L |
| 廠商： | IBM Microeletronics |
| 英文描述： | 1M x 64 DRAM Module(1M x 64 動態(tài)RAM模塊) |
| 中文描述： | 100萬× 64內(nèi)存（100萬× 64動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 13/31頁 |
| 文件大小： | 565K |
| 代理商： | IBM11N1645L |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
IBM11N1645L
IBM11N1735Q
1M x 64/72 DRAM Module
50H8035
SA14-4630-05
Revised 3/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 13 of 31
Refresh Cycle
Symbol
Parameter
-60
-6R
Unit
Notes
Min
Max
Min
Max
t
CHR
CAS Hold Time
(CAS before RAS Refresh Cycle)
10
—
10
—
ns
t
CSR
CAS Setup Time
(CAS before RAS Refresh Cycle)
5
—
5
—
ns
t
WRP
WE Setup Time
(CAS before RAS Refresh Cycle)
10
—
10
—
ns
t
WRH
WE Hold Time
(CAS before RAS Refresh Cycle)
10
—
10
—
ns
t
RPC
RAS Precharge to CAS Hold Time
5
—
5
—
ns
t
REF
Refresh Period
—
16
—
16
ms
1
1. 1024 refreshes are required every 16ms.
Presence Detect Read and Write Cycle
Symbol
Parameter
Min
Max
Unit
Notes
f
SCL
SCL Clock Frequency
100
kHZ
T
I
Noise Suppression Time Constant at SCL, SDA Inputs
100
ns
t
AA
SCL Low to SDA Data Out Valid
0.3
3.5
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
t
BUF
Time the Bus Must Be Free before a New Transmission Can Start
4.7
t
HD:STA
Start Condition Hold Time
4.0
t
LOW
Clock Low Period
4.7
t
HIGH
Clock High Period
4.0
t
SU:STA
Start Condition Setup Time(for a Repeated Start Condition)
4.7
t
HD:DAT
Data in Hold Time
0
t
SU:DAT
Data in Setup Time
250
ns
t
r
SDA and SCL Rise Time
1
μ
s
t
f
SDA and SCL Fall Time
300
ns
t
SU:STO
Stop Condition Setup Time
4.7
μ
s
t
DH
Data Out Hold Time
300
ns
t
WR
Write Cycle Time
15
ms
1
1. The write cycle time(tWR) is the time from a valid stop condition of a write sequence to the end of the internal erase/program
cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resis-
tor, and the device does not respond to its slave address.
Discontinued (9/98 - last order; 3/99 last ship)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM11N1735Q | 1M x 72 DRAM Module(1M x 72 動態(tài)RAM模塊) |
| IBM11N16845BB | 16M x 72 Chip-Kill Protect ECC-on-DIMM Module(16M x 72 帶糾錯代碼保護(hù)的小外形雙列直插動態(tài)RAM模塊) |
| IBM11N16845CB | 16M x 72 Chip-Kill Protect ECC-on-DIMM Module(16M x 72 帶糾錯代碼保護(hù)的小外形雙列直插動態(tài)RAM模塊) |
| IBM11N2645H | 2M x 64 DRAM Module(2M x 64 動態(tài)RAM模塊) |
| IBM11N2735H | 2M x 72 DRAM Module(2M x 72 動態(tài)RAM模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM14H5481 | 制造商:AVED Memory Products 功能描述: |
| IBM14H5540 | 制造商:AVED MEMORY PRODUCTS 功能描述: 制造商:AVED Memory Products 功能描述: |
| IBM17R8251 | 制造商:AVED Memory Products 功能描述: |
| IBM17R8252 | 制造商:AVED Memory Products 功能描述: |
| IBM1805T | 制造商:Schneider Electric 功能描述:IBM1805T |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。