參數(shù)資料
型號(hào): IBM11N8645C
廠商: IBM Microeletronics
英文描述: 8M x 64 DRAM MODULE(8M x 64動(dòng)態(tài)RAM模塊)
中文描述: 8米× 64 DRAM模塊(8米× 64動(dòng)態(tài)內(nèi)存模塊)
文件頁(yè)數(shù): 11/31頁(yè)
文件大?。?/td> 626K
代理商: IBM11N8645C
IBM11N8645B
IBM11N8645C
IBM11N8735B
IBM11N8735C
8M x 64/72 DRAM MODULE
75H1747
SA14-4624-04
Revised 3/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 11 of 33
Read Cycle
Symbol
Parameter
-60
-70
Unit
Notes
Min
Max
Min
Max
t
RAC
Access Time from RAS
60
70
ns
1, 2
t
CAC
Access Time from CAS
15
20
ns
1, 2
t
AA
Access Time from Address
30
35
ns
1, 2
t
OEA
Access Time from OE
15
20
ns
1, 2
t
RCS
Read Command Setup Time
0
0
ns
t
RCH
Read Command Hold Time to CAS
0
0
ns
3
t
RRH
Read Command Hold Time to RAS
0
0
ns
3
t
RAL
Column Address to RAS Lead Time
30
35
ns
t
CLZ
CAS to Output in Low-Z
0
0
ns
t
OES
OE setup time prior to CAS
5
5
ns
t
ORD
OE setup time prior to RAS (Hidden Refresh)
0
0
ns
t
CDD
CAS to D
IN
Delay Time
15
15
ns
5
t
OEZ
Output Buffer Turn-off Delay from OE
15
15
ns
4
t
OFF
Output Buffer Turn-off Delay
15
15
ns
4, 6
1. Measured with the specified current load and 100pF.
2. Access time is determined by the latter of t
RAC
, t
CAC
, t
CPA
, t
AA,
t
OEA
.
3. Either t
RCH
or t
RRH
must be satisfied.
4. t
OFF
(max) and t
OEZ
(max) define the time at which the output achieves the open circuit condition and is not referenced to output
voltage levels.
5. Either t
CDD
or t
ODD
must be satisfied.
6. t
OFF
is referenced from the rising edge of RAS or CAS , whichever is last.
Discontinued (9/98 - last order; 3/99 last ship)
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