參數(shù)資料
型號: IBM11N8645H
廠商: IBM Microeletronics
英文描述: 8M x 64 DRAM Module(8M x 64 動態(tài)RAM模塊)
中文描述: 8米× 64內(nèi)存(8米× 64動態(tài)內(nèi)存模塊)
文件頁數(shù): 23/31頁
文件大?。?/td> 564K
代理商: IBM11N8645H
IBM11N8645H
IBM11N8735H
8M x 64/72 DRAM Module
54H8530.E24352A
Revised 4/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 23 of 31
EDO Page Mode Read Modify Write Cycle
Address
RAS
WE
OE
D
OUT
D
IN
D
IN
D
IN
t
RP
t
CP
t
CP
t
ASR
t
RAD
t
RAH
t
CAH
t
ASC
t
ASC
t
CAH
t
ASC
t
CAH
t
WP
t
CWL
t
WP
t
RCS
t
RCS
t
WP
t
CWL
t
RWL
t
CAC
t
OEH
t
OEH
t
OEH
D
OUT
D
OUT
t
CLZ
t
CLZ
t
ODD
t
ODD
t
DH
t
DH
t
CLZ
t
ODD
t
DH
D
IN
D
OUT
: “H” or “L”
Hi-Z
Hi-Z
t
RASP
t
CAS
t
HPRWC
t
CAS
t
RAL
t
AWD
t
CWD
t
AA
t
CPA
t
AA
t
AWD
t
CWD
t
RWD
t
AWD
t
CWD
t
RCS
t
RAC
t
AA
t
OEA
t
OEA
t
CAC
t
CAC
t
OEA
t
OEZ
t
OEZ
t
DS
t
DS
t
DS
Column 1
Row
Column 2
Column N
t
CSH
t
OEZ
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
IH
V
IL
t
RCD
t
CAS
t
CRP
t
CPA
CAS
t
WRP
NOTE 1
t
WRH
NOTE 1:
Implementing WE at RAS time During a Read or Write Cycle is optional.
Doing so will facilitate compatibility with future EDO DRAMs.
Discontinued (9/98 - last order; 3/99 last ship)
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