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| 型號： | IBM11N8735C |
| 廠商： | IBM Microeletronics |
| 英文描述： | 8M x 72 DRAM MODULE(8M x 72動態(tài)RAM模塊) |
| 中文描述： | 8米× 72 DRAM模塊（8米× 72動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 9/31頁 |
| 文件大小： | 626K |
| 代理商： | IBM11N8735C |
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IBM11N8645B
IBM11N8645C
IBM11N8735B
IBM11N8735C
8M x 64/72 DRAM MODULE
75H1747
SA14-4624-04
Revised 3/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 9 of 33
AC Characteristics
(T
A
= 0 to +70
°
C, V
CC
=
3.3V
±
0.3V)
1. V
IH
(min) and V
IL
(max) are reference levels for measuring timing of input signals. Transition times are measured between V
IH
and
V
IL
.
2. An initial pause of 200
μ
s is required after power-up followed by 8 RAS only refresh cycles before proper device operation is
achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh
cycles is required..
3. AC measurements assume t
T
= 2ns.
.
Read, Write, Read-Modify-Write and Refresh Cycles
(Common Parameters)
Symbol
Parameter
-60
-70
Unit
Notes
Min
Max
Min
Max
t
RC
Random Read or Write Cycle Time
104
—
124
—
ns
t
RP
RAS Precharge Time
40
—
50
—
ns
t
CP
CAS Precharge Time
10
—
10
—
ns
t
RAS
RAS Pulse Width
60
10K
70
10K
ns
t
CAS
CAS Pulse Width
10
10K
12
10K
ns
t
ASR
Row Address Setup Time
0
—
0
—
ns
t
RAH
Row Address Hold Time
10
—
10
—
ns
t
ASC
Column Address Setup Time
0
—
0
—
ns
t
CAH
Column Address Hold Time
10
—
10
—
ns
t
RCD
RAS to CAS Delay Time
14
45
14
50
ns
1
t
RAD
RAS to Column Address Delay Time
12
30
12
35
ns
2
t
RSH
RAS Hold Time
10
—
12
—
ns
t
CSH
CAS Hold Time
50
—
55
—
ns
t
CRP
CAS to RAS Precharge Time
5
—
5
—
ns
t
ODD
OE to D
IN
Delay Time
15
—
15
—
ns
3
t
DZO
OE Delay Time from D
IN
0
—
0
—
ns
4
t
DZC
CAS Delay Time from D
IN
0
—
0
—
ns
4
t
T
Transition Time (Rise and Fall)
2
30
2
30
ns
1. Operation within the t
RCD
(max) limit ensures that t
RAC
(max) can be met. The t
RCD
(max) is specified as a reference point only: If t
RCD
is greater than the specified t
RCD
(max) limit, then access time is controlled by t
CAC.
2. Operation within the t
RAD
(max) limit ensures that t
RAC
(max) can be met. The t
RAD
(max) is specified as a reference point only: If t
RAD
is greater than the specified t
RAD
(max) limit, then access time is controlled by t
AA.
3. Either t
CDD
or t
ODD
must be satisfied.
4. Either t
DZC
or t
DZO
must be satisfied.
Discontinued (9/98 - last order; 3/99 last ship)
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