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參數(shù)資料
| 型號(hào)： | IBM13M32734BCA |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32M x 72 2-Bank Registered SDRAM Module(32M x 72 2組寄存同步動(dòng)態(tài)RAM模塊) |
| 中文描述： | 32M × 72配置2，銀行注冊(cè)內(nèi)存模塊（32M × 72配置2組寄存同步動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大小： | 441K |
| 代理商： | IBM13M32734BCA |
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IBM13M32734BCA
Preliminary
32M x 72 2-Bank Registered SDRAM Module
19L7297.F38442A
4/99
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 11 of 24
32
33
34
35
Address and Command Setup Time Before Clock
Address and Command Hold Time After Clock
Data Input Setup Time Before Clock
Data Input Hold Time After Clock
Reserved
SPD Revision
Checksum for bytes 0 - 62
Manufacturers’ JEDEC ID Code
1.5ns
0.8ns
1.5ns
0.8ns
Undefined
JEDEC 2
Checksum data
IBM
Toronto, Canada
Vimercate, Italy
15
08
15
08
00
02
cc
36 - 61
62
63
64 - 71
3
A400000000000000
91
53
72
Assembly Manufacturing Location
73 - 90
Assembly Part Number
ASCII ‘13M32734BC “R” -75AY
31334D33323733344243rr
373541592020
rr20
yyww
ssssssss
Not Specified
64
85
00
4, 5
91 - 92
93 - 94
95 - 98
99 - 125
126
127
128 - 255
Assembly Revision Code
Assembly Manufacturing Date
Assembly Serial Number
Reserved
Module Supports Clock Frequency
Attributes for clock frequency defined in Byte 126
Open for Customer Use
“R” plus ASCII Blank
Year/Week code
Serial Number
Undefined
100MHz
CLK0, CL = 3, C on AP
Undefined
5
6, 7
8
9
9
Serial Presence Detect
(Part 2 of 2)
Byte #
Description
SPD Entry Value
Serial PD
Data Entry
(Hexadecimal)
Notes
1. In a registered DIMM, data is delayed an additional clock cycle due to the on-DIMM pipeline register (that is, Device CL [clock
cycles] + 1 = DIMM CAS latency).
2. Minimum application clock cycle time is 7.5ns (133MHz).
3. cc = Checksum Data byte, 00-FF (Hex).
4. “R” = Alphanumeric revision code, A-Z, 0-9.
5. rr = ASCII coded revision code byte “R”.
6. ww = Binary coded decimal week code, 01-51 (Decimal) ‘ 01-34 (Hex).
7. yy = Binary coded decimal year code, 0-00 (Decimal) ‘ 00-63 (Hex).
8. ss = Serial number data byte, 00-FF (Hex).
9. These values apply to PC100 applications only.
Discontinued (8/99 - last order; 12/99 - last ship)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM13M32734BCB | 32M x 72 2-Bank Registered SDRAM Module(32M x 72 2組寄存同步動(dòng)態(tài)RAM模塊) |
| IBM13M32734BCC | 32M x 72 2 Bank Registered SDRAM Module(32M x 72 2組寄存同步動(dòng)態(tài)RAM模塊) |
| IBM13M32734BCD | 32M x 72 2-Bank Registered/Buffered SDRAM Module(32M x 72 2組寄存/緩沖同步動(dòng)態(tài)RAM模塊) |
| IBM13M32734BCE | 32M x 72 2-Bank Registered/Buffered SDRAM Module(32M x 72 2組寄存/緩沖同步動(dòng)態(tài)RAM模塊) |
| IBM13M32734CCA | 32M x 72 1 Bank Registered/Buffered SDRAM Module(32M x 72 1組寄存/緩沖同步動(dòng)態(tài)RAM模塊) |
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