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參數(shù)資料
| 型號： | IBM13M32734JCA |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32M x 72 Two Bank Registered/Buffered SDRAM Module(64M x 64 2組不帶緩沖同步動態(tài)RAM模塊) |
| 中文描述： | 32M × 72配置兩個銀行的注冊/緩沖內(nèi)存模組（64米× 64 2組不帶緩沖同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 529K |
| 代理商： | IBM13M32734JCA |
IBM13M32734JCA
32M x 72 Two Bank Registered/Buffered SDRAM Module
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 8 of 20
09K3883.F38743
4/00
31
32
33
34
35
Module Bank Density
Address and Command Setup Time Before Clock
Address and Command Hold Time After Clock
Data Input Setup Time Before Clock
Data Input Hold Time After Clock
Reserved
SPD Revision
Checksum for bytes 0 - 62
Manufacturers’ JEDEC ID Code
256MB
2.0ns
1.0ns
2.0ns
1.0ns
Undefined
PC100 1.2A
Checksum Data
IBM
Toronto, Canada
Vimercate, Italy
ASCII ‘13M32734JC”R”-
260T’
ASCII ‘13M32734JC”R”-
360T’
“R” plus ASCII blank
Year/Week Code
Serial Number
Undefined
100MHz
CLK0, CL=2,3, ConAP
CLK0 CL=3, ConAP
Undefined
40
20
10
20
10
00
12
cc
36 - 61
62
63
64 - 71
3
A400000000000000
91
53
31334D33323733344A43
rr2D323630542020
31334D33323733344A43
rr2D333630542020
rr20
yyww
ssssssss
Not Specified
64
87
85
00
72
Assembly Manufacturing Location
73 - 90
Assembly Part Number
-260
4, 5
-360
91 - 92
93 - 94
95 - 98
99 - 125 Reserved
126
Assembly Revision Code
Assembly Manufacturing Date
Assembly Serial Number
5
6, 7
8
Module Supports this Clock Frequency
127
Attributes for clock frequency defined in Byte 126
-260
-360
128 - 255 Open for Customer Use
Serial Presence Detect (Part 2 of 2)
Byte #
Description
SPD Entry Value
Serial PD Data Entry
(Hexadecimal)
Note
s
1. In a registered DIMM, data is delayed an additional clock cycle due to the on-DIMM pipeline register (that is, Device CL [clock
cycles] + 1 = DIMM CAS latency).
2. Minimum application clock cycle time is 10ns for -260 CL=2 and for -360 CL=3 and 15ns for -360 CL=2.
3. cc = Checksum Data byte, 00-FF (Hex).
4. “R” = Alphanumeric revision code, A-Z, 0-9.
5. rr = ASCII coded revision code byte “R”.
6. ww = Binary coded decimal week code, 01-52 (Decimal) ‘ 01-34 (Hex).
7. yy = Binary coded decimal year code, 00-99 (Decimal) ‘ 00-63 (Hex).
8. ss = Serial number data byte, 00-FF (Hex).
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