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參數(shù)資料
| 型號： | IBM13T1649NC |
| 廠商： | IBM Microeletronics |
| 英文描述： | 1M x 64 SDRAM SO DIMM(1M x 64 同步動態(tài)RAM模塊) |
| 中文描述： | 100萬蘇× 64 SDRAM的內(nèi)存（100萬× 64同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 291K |
| 代理商： | IBM13T1649NC |
IBM13T4644MC
IBM13T1649NC
1M x 64 SDRAM SO DIMM
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 8 of 15
75H5936
GA14-4477-03
Rev 3/98
Output Characteristics
(T
A
= 0 to +70C, V
DD
= 3.3V
±
0.3V)
Symbol
Parameter
Min.
Max.
Units
I
I(L)
Input Leakage Current, any input
(0.0V
≤
V
IN
≤
3.6V), All Other Pins
Not Under Test = 0V
-1
+1
μ
A
I
O(L)
Output Leakage Current
(D
OUT
is disabled, 0.0V
≤
V
OUT
≤
3.6V)
-1
+1
μ
A
V
OH
Output Level
Output “H” Level Voltage (I
OUT
= -2.0mA)
2.4
V
DD
V
V
OL
Output Level
Output “L” Level Voltage (I
OUT
= +2.0mA)
0.0
0.4
Standby and Refresh Currents
(T
A
= 0 to +70C, V
DD
= 3.3V
±
0.3V)
Parameter
Symbol
Test Condition
Organization
Units
Notes
x64
Precharge Standby Current in
Power Down Mode
IDD
1
P
CKE0
≤
V
IL
(max), t
CK
= 15ns
12
mA
IDD
1
PS
CKE0
≤
V
IL
(max), t
CK
= Infinity
8
mA
Precharge Standby Current in Non-
Power Down Mode
IDD
1
N
CKE0
≥
V
IH
(min), t
CK
= 15ns
Input Change every 30ns
100
mA
S0 = High
IDD
1
NS
CKE0
≥
V
IH
(min), t
CK
= Infinity
No Input Change
40
mA
Active Standby Current in Power
Down Mode
IDD
2
P
CKE0
≤
V
IL
(max), t
CK
= 15ns
12
mA
IDD
2
PS
CKE0
≤
V
IL
(max), t
CK
= Infinity
8
mA
Active Standby Current in Non-
Power Down Mode
IDD
2
N
CKE0
≥
V
IH
(min), t
CK
= 15ns
Input Change every 30ns
100
mA
S0 = High
IDD
2
NS
CKE0
≥
V
IH
(min), t
CK
= Infinity
No Input Change
60
mA
Auto (CBR) Refresh Current
IDD
3
CAS Latency = 1
t
RC
≥
t
RC
(min)
-10
340
mA
1, 2, 3
CAS Latency = 2
t
RC
≥
t
RC
(min)
-10
360
mA
CAS Latency = 3
t
RC
≥
t
RC
(min)
-10
440
mA
Self Refresh Current
IDD
4
CKE0
≤
0.2V
8
mA
Serial PD Device Standby
Current
I
SB
V
IN
= GND or V
DD
10
μ
A
4
1. The specified values are valid when addresses are changed no more than once during t
CK
(min).
2. The specified values are valid when No Operation commands are registered on every rising clock edge during t
RC
(min).
3. The specified values are valid when data inputs (DQs) are stable during t
RC
(min).
4. V
DD
= 3.3V.
Discontinued (12/98 - last order; 9/99 last ship)
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