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參數(shù)資料
| 型號(hào)： | IBM13T16644NPA |
| 廠商： | IBM Microeletronics |
| 英文描述： | 16M x 64 PC100 SDRAM(1MB PC100 同步動(dòng)態(tài)RAM) |
| 中文描述： | 16米x 64 PC100的SDRAM內(nèi)存（1MB的PC100的同步動(dòng)態(tài)內(nèi)存） |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 407K |
| 代理商： | IBM13T16644NPA |
IBM13T16644NPA
16M x 64 PC100 SDRAM SO DIMM
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 12 of 17
09K1470.E92279
11/99
Mode Register Set Cycle
Symbol
Parameter
-360
(CL, t
RCD
, t
RP
= 3 / 2 / 2)
Units
Notes
Min.
Max.
t
RSC
Mode Register Set Cycle Time
2
—
CLK
1
1. These parameters account for the number of clock cycle and depend on the operating frequency of the clock, as follows:
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).
Read Cycle
Symbol
Parameter
-360
(CL, t
RCD
, t
RP
= 3 / 2 / 2)
Units
Notes
Min.
Max.
t
OH
Data Out Hold Time
3
—
ns
t
LZ
Data Out to Low Impedance Time
0
—
ns
t
HZ3
Data Out to High Impedance Time
3
6
ns
1
t
HZ2
Data Out to High Impedance Time
3
8
ns
1
t
DQZ
DQM Data Out Disable Latency
2
—
CLK
1
1. Referenced to the time at which the output achieves the open circuit condition, not to output voltage level.
Refresh Cycle
Symbol
Parameter
-360
(CL, t
RCD
, t
RP
= 3 / 2 / 2)
Units
Notes
Min.
Max.
t
REF
Refresh Period
—
64
ms
1
t
SREX
Self Refresh Exit Time
10
ns
1. 4096 auto refresh cycles.
Write Cycle
Symbol
Parameter
-360
(CL, t
RCD
, t
RP
= 3 / 2 / 2)
Units
Min.
Max.
t
DS
Data In Set-up Time
2
—
ns
t
DH
Data In Hold Time
1
—
ns
t
DPL
Data Input to Precharge
10
—
ns
t
DQW
DQM Write Mask Latency
0
—
CLK
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