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參數(shù)資料
| 型號： | IBM13T4644MPE |
| 廠商： | IBM Microeletronics |
| 英文描述： | 4M x 64 PC100 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(4M x 64 PC100小外形雙列直插式同步動態(tài)RAM模塊) |
| 中文描述： | 4米× 64蘇PC100的SDRAM的內(nèi)存（小外型雙線內(nèi)存模組）（4米× 64 PC100的小外形雙列直插式同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 269K |
| 代理商： | IBM13T4644MPE |
IBM13T4644MPE
4M x 64 PC100 SDRAM SO DIMM
45L7084.E93888B
10/99
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 11 of 17
Common Parameters
Symbol
Parameter
-360
(CL, t
RCD
, t
RP
= 3 / 2 / 2)
Units Notes
Min.
Max.
t
CS
Command Setup Time
2
—
ns
t
CH
Command Hold Time
1
—
ns
t
AS
Address and Bank Select Set-up Time
2
—
ns
t
AH
Address and Bank Select Hold Time
1
—
ns
t
RCD
RAS to CAS Delay
20
—
ns
1
t
RC
Bank Cycle Time
70
—
ns
1
t
RAS
Active Command Period
50
100000
ns
1
t
RP
Precharge Time
20
—
ns
1
t
RRD
Bank to Bank Delay Time
20
—
ns
1
t
CCD
CAS to CAS Delay Time
1
—
CLK
1. These parameters account for the number of clock cycle and depend on the operating frequency of the clock, as follows:
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).
Mode Register Set Cycle
Symbol
Parameter
-360
(CL, t
RCD
, t
RP
= 3 / 2 / 2)
Units
Notes
Min.
Max.
t
RSC
Mode Register Set Cycle Time
2
—
CLK
1
1. These parameters account for the number of clock cycle and depend on the operating frequency of the clock, as follows:
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).
Discontinued (4/1/00 last order; 7/31/00 - last ship)
相關(guān)PDF資料 |
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| IBM13T8644HPB | 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Modules）(8M x 64 144腳小外形雙列直插同步動態(tài)RAM模塊) |
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