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參數(shù)資料
| 型號(hào)： | IBM13T8644HPC |
| 廠商： | IBM Microeletronics |
| 英文描述： | 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Modules）(8M x 64 144腳小外形雙列直插同步動(dòng)態(tài)RAM模塊) |
| 中文描述： | 8米× 64 SDRAM的內(nèi)存蘇（小外形雙列直插式內(nèi)存模塊）（8米× 64 144腳小外形雙列直插同步動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 12/17頁(yè) |
| 文件大?。?/td> | 325K |
| 代理商： | IBM13T8644HPC |
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IBM13T8644HPB
IBM13T8644HPC
8M x 64 SDRAM SO DIMM
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 12 of 17
01L5951.E24562B
5/99
Refresh Cycle
Symbol
Parameter
Units
Notes
t
REF
Refresh Period
ms
1
t
SREX
Self Refresh Exit Time
ns
1. 4096 cycles.
Write Cycle
Symbol
Parameter
10
Units
Min.
Max.
t
DS
Data In Setup Time
3
—
ns
t
DH
Data In Hold Time
1
—
ns
t
DPL3
Data input to Precharge, CL
=
3
10
—
ns
t
DPL2
Data input to Precharge, CL
=
2
15
—
ns
t
DQW
DQM Write Mask Latency
0
—
CK
Presence Detect Read and Write Cycle
Symbol
f
SCL
T
I
t
AA
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
r
t
f
t
SU:STO
t
DH
t
WR
Parameter
Min.
Max.
Units
Notes
SCL Clock Frequency
100
kHz
Noise Suppression Time Constant at SCL, SDA Inputs
100
ns
SCL Low to SDA Data Out Valid
0.3
3.5
μ
s
Time the Bus Must Be Free before a New Transmission Can Start
4.7
μ
s
Start Condition Hold Time
4.0
μ
s
Clock Low Period
4.7
μ
s
Clock High Period
4.0
μ
s
Start Condition Setup Time (for a Repeated Start Condition)
4.7
μ
s
Data in Hold Time
0
μ
s
Data in Setup Time
250
ns
SDA and SCL Rise Time
1
μ
s
SDA and SCL Fall Time
300
ns
Stop Condition Setup Time
4.7
μ
s
Data Out Hold Time
300
ns
Write Cycle Time
15
ms
1
1. The Write cycle time (t
WR
) is the time from a valid stop condition of a write sequence to the end of the internal Erase/Program
cycle. During the Write cycle, the bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resis-
tor, and the device does not respond to its slave address.
Discontinued (8/99 - last order; 12/99 - last ship)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM13T8644HPD | One Bank 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(1組 8M x 64 PC100小外形雙列直插同步動(dòng)態(tài)RAM模塊) |
| IBM13T8644HPE | One Bank 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(1組 8M x 64 PC100小外形雙列直插式同步動(dòng)態(tài)RAM模塊) |
| IBM13T8644MPD | Two Bank 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(2組 8M x 64 PC100小外形雙列直插同步動(dòng)態(tài)RAM模塊) |
| IBM13T8644MPE | 8M x 64 PC100 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(8M x 64 PC100小外形雙列直插式同步動(dòng)態(tài)RAM模塊) |
| IBM13V25649AN | 256K x 64 SGRAM SO DIMM（Small Outline Dual In-line Memory Modules）(256K x 64 144腳小外形雙列直插同步圖形RAM模塊) |
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