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IBM2520L8767
IBM Processor for ATM Resources
ATM Subsystem Dataflow
Page 14 of 553
atmrm.chapt01.01
08/27/99
As shown in the figure, Data, in the form of application objects or control structures, are divided into commu-
nication frames at the communication stack interface. The stack may further partition the frames to fit reliabil-
ity, efficiency, latency, and protocol requirements.
In most cases, the communication stack encapsulates the data frame with protocol headers and/or trailers.
These header blocks are often located in memory in areas apart from the Data frames. A device driver is
often given the task of moving this scattered memory to the actual transmission device. Scatter DMA is often
used to make this operation efficient.
With an IBM2520L8767 in the ATM Subsystem, the data can be DMAed into virtually contiguous buffers con-
nected to and controlled by the IBM2520L8767. It is also possible to write the frame headers directly from the
processor to the IBM2520L8767 memory. The fully assembled frame is queued for transmission over a par-
ticular logical channel. (See more on the richness of logical channels in ATM and the IBM2520L8767 in
Data
Structures
on page 35).
The logical channels with pending work are serviced by the ATM Segmentation Layer which breaks the
enqueued data into 48-byte chunks (depending on the ATM Adaptation Layer (AAL)) and prefixes it with a
five-byte header in preparation for transmission (yielding 53-byte packets).
A Transmission Convergence (TC) Sublayer appropriate for the Physical Layer (PHY) and Physical Media
Dependent (PMD) connection is then exercised, making ATM cells suitable for transmission.
The receiving process is the reverse of the transmission process, except that the scheduling performed dur-
ing transmission is replaced by an identification-demultiplexing step during the reception of cells.
Isochronous/time-based support:
Note that not all of these separate parts or steps described in this section
are necessary for a dedicated function system. The IBM2520L8767 can easily be used in dedicated systems
due to it goal of minimal processor intervention for steady state operations.
ATM Subsystem Dataflow
Object Data
Object Data
Application
Data Frames
Frame Headers
and Data
Packet Memory
Local
Channels
LAN Emulation
TCP/IP Mapping
Communication Stack
Device Driver
ATM
Cells
Segmentation
Scheduling
Physical Layer (TC)
PMD / Transceiver
Control Memory