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參數(shù)資料
| 型號： | IBM39MPEGCS24DPFA16C |
| 廠商： | IBM Microeletronics |
| 英文描述： | High Performance Audio/Video Decoder(高性能音頻/視頻譯碼器) |
| 中文描述： | 高性能音頻/視頻解碼器（高性能音頻/視頻譯碼器） |
| 文件頁數(shù)： | 6/22頁 |
| 文件大?。?/td> | 278K |
| 代理商： | IBM39MPEGCS24DPFA16C |
IBM39MPEGCS24PFA16C
IBM39MPEGCS24DPFA16C
High Performance Audio/Video Decoder
Supported Input Image Sizes
Page 6 of 21
mpegcs24ds.00
12/10/99 Summary Datasheet
On-Screen Display (OSD) and Output Interface
A versatile OSD enhances the user’s ability to control video decoding. It includes a multi-region link list with a
color table for each region. Advanced features of the OSD include block copying, overlay and video blending,
video shading (in OSD area), and animation support. OSD supports Professional Profile Display sizes up to
512 lines NTSC, 608 lines for PAL.
OSD supports Direct color (16 bits per pixel bitmap) resolution.
Through the OSD, the resolution of each region of the bitmap can be programmed separately, with the follow-
ing options:
2 bits/pixel pair
2 bits/pixel
4 bits/pixel pair
4 bits/pixel
8 bits/pixel pair
8 bits/pixel
The output interface supports three sync modes: composite blanking with field ID, H/V Sync and CCIR 656
Master Mode. Signal polarity is programmable. The pixel data bus can be 8 or 16 bits.
Memory Interface
The Memory Interface is based on a 16-bit bus, and is designed to use either 16 Mb or 64 Mb, 125 MHz
SDRAM, for a 4 MB or 8 MB configuration.
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相關(guān)代理商/技術(shù)參數(shù) |
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